diff options
Diffstat (limited to 'src/glsl/nir/nir_intrinsics.h')
| -rw-r--r-- | src/glsl/nir/nir_intrinsics.h | 27 |
1 files changed, 13 insertions, 14 deletions
diff --git a/src/glsl/nir/nir_intrinsics.h b/src/glsl/nir/nir_intrinsics.h index e66273d3847..d94866c8597 100644 --- a/src/glsl/nir/nir_intrinsics.h +++ b/src/glsl/nir/nir_intrinsics.h @@ -101,11 +101,11 @@ SYSTEM_VALUE(invocation_id, 1) /* * The first index is the address to load from, and the second index is the - * number of array elements to load. For UBO's (and SSBO's), the first index - * is the UBO buffer index (TODO nonconstant UBO buffer index) and the second - * and third indices play the role of the first and second indices in the other - * loads. Indirect loads have an additional register input, which is added - * to the constant address to compute the final address to load from. + * number of array elements to load. Indirect loads have an additional + * register input, which is added to the constant address to compute the + * final address to load from. For UBO's (and SSBO's), the first source is + * the (possibly constant) UBO buffer index and the indirect (if it exists) + * is the second source. * * For vector backends, the address is in terms of one vec4, and so each array * element is +4 scalar components from the previous array element. For scalar @@ -113,16 +113,15 @@ SYSTEM_VALUE(invocation_id, 1) * elements begin immediately after the previous array element. */ -#define LOAD(name, num_indices, flags) \ - INTRINSIC(load_##name, 0, ARR(), true, 0, 0, num_indices, \ - NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) \ - INTRINSIC(load_##name##_indirect, 1, ARR(1), true, 0, 0, num_indices, \ - NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) \ +#define LOAD(name, extra_srcs, flags) \ + INTRINSIC(load_##name, extra_srcs, ARR(1), true, 0, 0, 2, flags) \ + INTRINSIC(load_##name##_indirect, extra_srcs + 1, ARR(1, 1), \ + true, 0, 0, 2, flags) -LOAD(uniform, 2, NIR_INTRINSIC_CAN_REORDER) -LOAD(ubo, 3, NIR_INTRINSIC_CAN_REORDER) -LOAD(input, 2, NIR_INTRINSIC_CAN_REORDER) -/* LOAD(ssbo, 2, 0) */ +LOAD(uniform, 0, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) +LOAD(ubo, 1, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) +LOAD(input, 0, NIR_INTRINSIC_CAN_ELIMINATE | NIR_INTRINSIC_CAN_REORDER) +/* LOAD(ssbo, 1, 0) */ /* * Stores work the same way as loads, except now the first register input is |