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-rw-r--r--src/gallium/drivers/freedreno/a3xx/fd3_program.c2
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_program.c2
-rw-r--r--src/gallium/drivers/freedreno/a5xx/fd5_program.c17
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_program.c17
4 files changed, 12 insertions, 26 deletions
diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_program.c b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
index c6a07b19389..cbcdfe57ea7 100644
--- a/src/gallium/drivers/freedreno/a3xx/fd3_program.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_program.c
@@ -237,7 +237,7 @@ fd3_program_emit(struct fd_ringbuffer *ring, struct fd3_emit *emit,
A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(fp->varying_in));
struct ir3_shader_linkage l = {0};
- ir3_link_shaders(&l, vp, fp);
+ ir3_link_shaders(&l, vp, fp, false);
for (i = 0, j = 0; (i < 16) && (j < l.cnt); i++) {
uint32_t reg = 0;
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_program.c b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
index 4a0e7568250..d9ccecb06ad 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
@@ -289,7 +289,7 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit,
A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(s[FS].v->varying_in));
struct ir3_shader_linkage l = {0};
- ir3_link_shaders(&l, s[VS].v, s[FS].v);
+ ir3_link_shaders(&l, s[VS].v, s[FS].v, false);
for (i = 0, j = 0; (i < 16) && (j < l.cnt); i++) {
uint32_t reg = 0;
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_program.c b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
index b427f989470..a2fe505b4dd 100644
--- a/src/gallium/drivers/freedreno/a5xx/fd5_program.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_program.c
@@ -410,24 +410,17 @@ fd5_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring,
COND(s[VS].v->num_samp > 0, A5XX_SP_VS_CTRL_REG0_PIXLODENABLE));
struct ir3_shader_linkage l = {0};
- ir3_link_shaders(&l, s[VS].v, s[FS].v);
+ ir3_link_shaders(&l, s[VS].v, s[FS].v, true);
if ((s[VS].v->shader->stream_output.num_outputs > 0) &&
!emit->binning_pass)
link_stream_out(&l, s[VS].v);
- BITSET_DECLARE(varbs, 128) = {0};
- uint32_t *varmask = (uint32_t *)varbs;
-
- for (i = 0; i < l.cnt; i++)
- for (j = 0; j < util_last_bit(l.var[i].compmask); j++)
- BITSET_SET(varbs, l.var[i].loc + j);
-
OUT_PKT4(ring, REG_A5XX_VPC_VAR_DISABLE(0), 4);
- OUT_RING(ring, ~varmask[0]); /* VPC_VAR[0].DISABLE */
- OUT_RING(ring, ~varmask[1]); /* VPC_VAR[1].DISABLE */
- OUT_RING(ring, ~varmask[2]); /* VPC_VAR[2].DISABLE */
- OUT_RING(ring, ~varmask[3]); /* VPC_VAR[3].DISABLE */
+ OUT_RING(ring, ~l.varmask[0]); /* VPC_VAR[0].DISABLE */
+ OUT_RING(ring, ~l.varmask[1]); /* VPC_VAR[1].DISABLE */
+ OUT_RING(ring, ~l.varmask[2]); /* VPC_VAR[2].DISABLE */
+ OUT_RING(ring, ~l.varmask[3]); /* VPC_VAR[3].DISABLE */
/* a5xx appends pos/psize to end of the linkage map: */
if (pos_regid != regid(63,0))
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index 96bed761579..9e12cb246c9 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -429,20 +429,13 @@ setup_stateobj(struct fd_ringbuffer *ring, struct fd_screen *screen,
struct ir3_shader_linkage l = {0};
const struct ir3_shader_variant *last_shader = fd6_last_shader(state);
- ir3_link_shaders(&l, last_shader, fs);
-
- BITSET_DECLARE(varbs, 128) = {0};
- uint32_t *varmask = (uint32_t *)varbs;
-
- for (i = 0; i < l.cnt; i++)
- for (j = 0; j < util_last_bit(l.var[i].compmask); j++)
- BITSET_SET(varbs, l.var[i].loc + j);
+ ir3_link_shaders(&l, last_shader, fs, true);
OUT_PKT4(ring, REG_A6XX_VPC_VAR_DISABLE(0), 4);
- OUT_RING(ring, ~varmask[0]); /* VPC_VAR[0].DISABLE */
- OUT_RING(ring, ~varmask[1]); /* VPC_VAR[1].DISABLE */
- OUT_RING(ring, ~varmask[2]); /* VPC_VAR[2].DISABLE */
- OUT_RING(ring, ~varmask[3]); /* VPC_VAR[3].DISABLE */
+ OUT_RING(ring, ~l.varmask[0]); /* VPC_VAR[0].DISABLE */
+ OUT_RING(ring, ~l.varmask[1]); /* VPC_VAR[1].DISABLE */
+ OUT_RING(ring, ~l.varmask[2]); /* VPC_VAR[2].DISABLE */
+ OUT_RING(ring, ~l.varmask[3]); /* VPC_VAR[3].DISABLE */
/* Add stream out outputs after computing the VPC_VAR_DISABLE bitmask. */
if (last_shader->shader->stream_output.num_outputs > 0)