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Diffstat (limited to 'src/gallium/drivers/radeonsi/r600_state_common.c')
-rw-r--r--src/gallium/drivers/radeonsi/r600_state_common.c257
1 files changed, 0 insertions, 257 deletions
diff --git a/src/gallium/drivers/radeonsi/r600_state_common.c b/src/gallium/drivers/radeonsi/r600_state_common.c
index af8a0b49de9..d54ffc56f09 100644
--- a/src/gallium/drivers/radeonsi/r600_state_common.c
+++ b/src/gallium/drivers/radeonsi/r600_state_common.c
@@ -176,24 +176,6 @@ void *si_create_vertex_elements(struct pipe_context *ctx,
return v;
}
-static void r600_update_alpha_ref(struct r600_context *rctx)
-{
-#if 0
- unsigned alpha_ref;
- struct r600_pipe_state rstate;
-
- alpha_ref = rctx->alpha_ref;
- rstate.nregs = 0;
- if (rctx->export_16bpc)
- alpha_ref &= ~0x1FFF;
- r600_pipe_state_add_reg(&rstate, R_028438_SX_ALPHA_REF, alpha_ref, NULL, 0);
-
- r600_context_pipe_state_set(rctx, &rstate);
- rctx->alpha_ref_dirty = false;
-#endif
-}
-
-
struct pipe_stream_output_target *
r600_create_so_target(struct pipe_context *ctx,
struct pipe_resource *buffer,
@@ -259,245 +241,6 @@ void r600_set_so_targets(struct pipe_context *ctx,
rctx->streamout_append_bitmask = append_bitmask;
}
-static void r600_vertex_buffer_update(struct r600_context *rctx)
-{
- struct pipe_context *ctx = &rctx->context;
- struct r600_pipe_state *rstate = &rctx->vs_user_data;
- struct r600_resource *rbuffer, *t_list_buffer;
- struct pipe_vertex_buffer *vertex_buffer;
- unsigned i, count, offset;
- uint32_t *ptr;
- uint64_t va;
-
- r600_inval_vertex_cache(rctx);
-
- /* bind vertex buffer once */
- count = rctx->nr_vertex_buffers;
- assert(count <= 256 / 4);
-
- t_list_buffer = (struct r600_resource*)
- pipe_buffer_create(ctx->screen, PIPE_BIND_CUSTOM,
- PIPE_USAGE_IMMUTABLE, 4 * 4 * count);
- if (t_list_buffer == NULL)
- return;
-
- ptr = (uint32_t*)rctx->ws->buffer_map(t_list_buffer->cs_buf,
- rctx->cs,
- PIPE_TRANSFER_WRITE);
-
- for (i = 0 ; i < count; i++, ptr += 4) {
- struct pipe_vertex_element *velem = &rctx->vertex_elements->elements[i];
- const struct util_format_description *desc;
- unsigned data_format, num_format;
- int first_non_void;
-
- /* bind vertex buffer once */
- vertex_buffer = &rctx->vertex_buffer[i];
- rbuffer = (struct r600_resource*)vertex_buffer->buffer;
- offset = 0;
- if (vertex_buffer == NULL || rbuffer == NULL)
- continue;
- offset += vertex_buffer->buffer_offset;
-
- va = r600_resource_va(ctx->screen, (void*)rbuffer);
- va += offset;
-
- desc = util_format_description(velem->src_format);
- first_non_void = util_format_get_first_non_void_channel(velem->src_format);
- data_format = si_translate_vertexformat(ctx->screen,
- velem->src_format,
- desc, first_non_void);
-
- switch (desc->channel[first_non_void].type) {
- case UTIL_FORMAT_TYPE_FIXED:
- num_format = V_008F0C_BUF_NUM_FORMAT_USCALED; /* XXX */
- break;
- case UTIL_FORMAT_TYPE_SIGNED:
- num_format = V_008F0C_BUF_NUM_FORMAT_SNORM;
- break;
- case UTIL_FORMAT_TYPE_UNSIGNED:
- num_format = V_008F0C_BUF_NUM_FORMAT_UNORM;
- break;
- case UTIL_FORMAT_TYPE_FLOAT:
- default:
- num_format = V_008F14_IMG_NUM_FORMAT_FLOAT;
- }
-
- /* Fill in T# buffer resource description */
- ptr[0] = va & 0xFFFFFFFF;
- ptr[1] = (S_008F04_BASE_ADDRESS_HI(va >> 32) |
- S_008F04_STRIDE(vertex_buffer->stride));
- if (vertex_buffer->stride > 0)
- ptr[2] = ((vertex_buffer->buffer->width0 - offset) /
- vertex_buffer->stride);
- else
- ptr[2] = vertex_buffer->buffer->width0 - offset;
- ptr[3] = (S_008F0C_DST_SEL_X(si_map_swizzle(desc->swizzle[0])) |
- S_008F0C_DST_SEL_Y(si_map_swizzle(desc->swizzle[1])) |
- S_008F0C_DST_SEL_Z(si_map_swizzle(desc->swizzle[2])) |
- S_008F0C_DST_SEL_W(si_map_swizzle(desc->swizzle[3])) |
- S_008F0C_NUM_FORMAT(num_format) |
- S_008F0C_DATA_FORMAT(data_format));
-
- r600_context_bo_reloc(rctx, rbuffer, RADEON_USAGE_READ);
- }
-
- rstate->nregs = 0;
-
- va = r600_resource_va(ctx->screen, (void*)t_list_buffer);
- r600_pipe_state_add_reg(rstate,
- R_00B148_SPI_SHADER_USER_DATA_VS_6,
- va, t_list_buffer, RADEON_USAGE_READ);
- r600_pipe_state_add_reg(rstate,
- R_00B14C_SPI_SHADER_USER_DATA_VS_7,
- va >> 32,
- NULL, 0);
-
- r600_context_pipe_state_set(rctx, rstate);
-}
-
-static void si_update_derived_state(struct r600_context *rctx)
-{
- struct pipe_context * ctx = (struct pipe_context*)rctx;
-
- if (!rctx->blitter->running) {
- if (rctx->have_depth_fb || rctx->have_depth_texture)
- r600_flush_depth_textures(rctx);
- }
-
- if ((rctx->ps_shader->shader.fs_write_all &&
- (rctx->ps_shader->shader.nr_cbufs != rctx->framebuffer.nr_cbufs)) ||
- (rctx->sprite_coord_enable &&
- (rctx->ps_shader->sprite_coord_enable != rctx->sprite_coord_enable))) {
- si_pipe_shader_destroy(&rctx->context, rctx->ps_shader);
- }
-
- if (rctx->alpha_ref_dirty) {
- r600_update_alpha_ref(rctx);
- }
-
- if (!rctx->vs_shader->bo) {
- si_pipe_shader_vs(ctx, rctx->vs_shader);
- }
-
- if (!rctx->ps_shader->bo) {
- si_pipe_shader_ps(ctx, rctx->ps_shader);
- }
-
- if (rctx->shader_dirty) {
- si_update_spi_map(rctx);
- rctx->shader_dirty = false;
- }
-}
-
-void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *dinfo)
-{
- struct r600_context *rctx = (struct r600_context *)ctx;
- struct si_state_dsa *dsa = rctx->queued.named.dsa;
- struct pipe_draw_info info = *dinfo;
- struct r600_draw rdraw = {};
- struct pipe_index_buffer ib = {};
- struct r600_block *dirty_block = NULL, *next_block = NULL;
- struct r600_atom *state = NULL, *next_state = NULL;
- int i;
-
- if ((!info.count && (info.indexed || !info.count_from_stream_output)) ||
- (info.indexed && !rctx->index_buffer.buffer)) {
- return;
- }
-
- if (!rctx->ps_shader || !rctx->vs_shader)
- return;
-
- si_update_derived_state(rctx);
-
- r600_vertex_buffer_update(rctx);
-
- rdraw.vgt_num_indices = info.count;
- rdraw.vgt_num_instances = info.instance_count;
-
- if (info.indexed) {
- /* Initialize the index buffer struct. */
- pipe_resource_reference(&ib.buffer, rctx->index_buffer.buffer);
- ib.index_size = rctx->index_buffer.index_size;
- ib.offset = rctx->index_buffer.offset + info.start * ib.index_size;
-
- /* Translate or upload, if needed. */
- r600_translate_index_buffer(rctx, &ib, info.count);
-
- if (ib.user_buffer) {
- r600_upload_index_buffer(rctx, &ib, info.count);
- }
-
- /* Initialize the r600_draw struct with index buffer info. */
- if (ib.index_size == 4) {
- rdraw.vgt_index_type = V_028A7C_VGT_INDEX_32 |
- (R600_BIG_ENDIAN ? V_028A7C_VGT_DMA_SWAP_32_BIT : 0);
- } else {
- rdraw.vgt_index_type = V_028A7C_VGT_INDEX_16 |
- (R600_BIG_ENDIAN ? V_028A7C_VGT_DMA_SWAP_16_BIT : 0);
- }
- rdraw.indices = (struct r600_resource*)ib.buffer;
- rdraw.indices_bo_offset = ib.offset;
- rdraw.vgt_draw_initiator = V_0287F0_DI_SRC_SEL_DMA;
- } else {
- info.index_bias = info.start;
- rdraw.vgt_draw_initiator = V_0287F0_DI_SRC_SEL_AUTO_INDEX;
- if (info.count_from_stream_output) {
- rdraw.vgt_draw_initiator |= S_0287F0_USE_OPAQUE(1);
-
- r600_context_draw_opaque_count(rctx, (struct r600_so_target*)info.count_from_stream_output);
- }
- }
-
- rctx->vs_shader_so_strides = rctx->vs_shader->so_strides;
-
- if (!si_update_draw_info_state(rctx, &info))
- return;
-
- rdraw.db_render_override = dsa->db_render_override;
- rdraw.db_render_control = dsa->db_render_control;
-
- /* Emit states. */
- rctx->pm4_dirty_cdwords += si_pm4_dirty_dw(rctx);
-
- r600_need_cs_space(rctx, 0, TRUE);
-
- LIST_FOR_EACH_ENTRY_SAFE(state, next_state, &rctx->dirty_states, head) {
- r600_emit_atom(rctx, state);
- }
- LIST_FOR_EACH_ENTRY_SAFE(dirty_block, next_block, &rctx->dirty,list) {
- r600_context_block_emit_dirty(rctx, dirty_block);
- }
- si_pm4_emit_dirty(rctx);
- rctx->pm4_dirty_cdwords = 0;
-
- /* Enable stream out if needed. */
- if (rctx->streamout_start) {
- r600_context_streamout_begin(rctx);
- rctx->streamout_start = FALSE;
- }
-
- for (i = 0; i < NUM_TEX_UNITS; i++) {
- if (rctx->ps_samplers.views[i])
- r600_context_bo_reloc(rctx,
- (struct r600_resource*)rctx->ps_samplers.views[i]->base.texture,
- RADEON_USAGE_READ);
- }
-
- si_context_draw(rctx, &rdraw);
-
- rctx->flags |= R600_CONTEXT_DST_CACHES_DIRTY | R600_CONTEXT_DRAW_PENDING;
-
- if (rctx->framebuffer.zsbuf)
- {
- struct pipe_resource *tex = rctx->framebuffer.zsbuf->texture;
- ((struct r600_resource_texture *)tex)->dirty_db = TRUE;
- }
-
- pipe_resource_reference(&ib.buffer, NULL);
-}
-
void _r600_pipe_state_add_reg(struct r600_context *ctx,
struct r600_pipe_state *state,
uint32_t offset, uint32_t value,