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Diffstat (limited to 'src/amd/vulkan/radv_meta_resolve_cs.c')
-rw-r--r--src/amd/vulkan/radv_meta_resolve_cs.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/amd/vulkan/radv_meta_resolve_cs.c b/src/amd/vulkan/radv_meta_resolve_cs.c
index f1b38d3ffc8..c40c61929d2 100644
--- a/src/amd/vulkan/radv_meta_resolve_cs.c
+++ b/src/amd/vulkan/radv_meta_resolve_cs.c
@@ -146,7 +146,7 @@ enum {
};
static const char *
-get_resolve_mode_str(VkResolveModeFlagBitsKHR resolve_mode)
+get_resolve_mode_str(VkResolveModeFlagBits resolve_mode)
{
switch (resolve_mode) {
case VK_RESOLVE_MODE_SAMPLE_ZERO_BIT_KHR:
@@ -165,7 +165,7 @@ get_resolve_mode_str(VkResolveModeFlagBitsKHR resolve_mode)
static nir_shader *
build_depth_stencil_resolve_compute_shader(struct radv_device *dev, int samples,
int index,
- VkResolveModeFlagBitsKHR resolve_mode)
+ VkResolveModeFlagBits resolve_mode)
{
nir_builder b;
char name[64];
@@ -413,7 +413,7 @@ static VkResult
create_depth_stencil_resolve_pipeline(struct radv_device *device,
int samples,
int index,
- VkResolveModeFlagBitsKHR resolve_mode,
+ VkResolveModeFlagBits resolve_mode,
VkPipeline *pipeline)
{
VkResult result;
@@ -707,7 +707,7 @@ emit_depth_stencil_resolve(struct radv_cmd_buffer *cmd_buffer,
const VkOffset2D *dest_offset,
const VkExtent2D *resolve_extent,
VkImageAspectFlags aspects,
- VkResolveModeFlagBitsKHR resolve_mode)
+ VkResolveModeFlagBits resolve_mode)
{
struct radv_device *device = cmd_buffer->device;
const uint32_t samples = src_iview->image->info.samples;
@@ -961,7 +961,7 @@ radv_cmd_buffer_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer)
void
radv_depth_stencil_resolve_subpass_cs(struct radv_cmd_buffer *cmd_buffer,
VkImageAspectFlags aspects,
- VkResolveModeFlagBitsKHR resolve_mode)
+ VkResolveModeFlagBits resolve_mode)
{
struct radv_framebuffer *fb = cmd_buffer->state.framebuffer;
const struct radv_subpass *subpass = cmd_buffer->state.subpass;