diff options
Diffstat (limited to 'src/amd/common')
| -rw-r--r-- | src/amd/common/ac_surface.c | 7 | ||||
| -rw-r--r-- | src/amd/common/ac_surface.h | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/src/amd/common/ac_surface.c b/src/amd/common/ac_surface.c index 0a7d9e0d9b2..b29bf552c9f 100644 --- a/src/amd/common/ac_surface.c +++ b/src/amd/common/ac_surface.c @@ -343,6 +343,13 @@ static int gfx6_compute_level(ADDR_HANDLE addrlib, else surf_level->dcc_slice_fast_clear_size = 0; } + + if (surf->flags & RADEON_SURF_CONTIGUOUS_DCC_LAYERS && + surf->dcc_slice_size != surf_level->dcc_slice_fast_clear_size) { + surf->dcc_size = 0; + surf->num_dcc_levels = 0; + AddrDccOut->subLvlCompressible = false; + } } else { surf_level->dcc_slice_fast_clear_size = surf_level->dcc_fast_clear_size; } diff --git a/src/amd/common/ac_surface.h b/src/amd/common/ac_surface.h index 7405192d57c..161a54c9888 100644 --- a/src/amd/common/ac_surface.h +++ b/src/amd/common/ac_surface.h @@ -69,7 +69,7 @@ enum radeon_micro_mode { #define RADEON_SURF_DISABLE_DCC (1 << 22) #define RADEON_SURF_TC_COMPATIBLE_HTILE (1 << 23) #define RADEON_SURF_IMPORTED (1 << 24) -/* gap */ +#define RADEON_SURF_CONTIGUOUS_DCC_LAYERS (1 << 25) #define RADEON_SURF_SHAREABLE (1 << 26) #define RADEON_SURF_NO_RENDER_TARGET (1 << 27) /* Force a swizzle mode (gfx9+) or tile mode (gfx6-8). |