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-rw-r--r--src/amd/common/ac_gpu_info.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h
index 10b578a1ef9..173cc82084a 100644
--- a/src/amd/common/ac_gpu_info.h
+++ b/src/amd/common/ac_gpu_info.h
@@ -61,6 +61,7 @@ struct radeon_info {
bool has_clear_state;
bool has_distributed_tess;
bool has_dcc_constant_encode;
+ bool has_rbplus; /* if RB+ registers exist */
/* There are 2 display DCC codepaths, because display expects unaligned DCC. */
/* Disable RB and pipe alignment to skip the retile blit. (1 RB chips only) */