diff options
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_line.c | 6 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_tri.c | 2 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clip_unfilled.c | 7 | ||||
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 1 |
4 files changed, 11 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clip_line.c b/src/mesa/drivers/dri/i965/brw_clip_line.c index 42289e7cbd6..cc5fc38329c 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_line.c +++ b/src/mesa/drivers/dri/i965/brw_clip_line.c @@ -160,10 +160,9 @@ static void clip_and_emit_line( struct brw_clip_compile *c ) brw_AND(p, brw_null_reg(), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<20)); brw_OR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(0x3f)); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; } - brw_set_predicate_control(p, BRW_PREDICATE_NONE); - /* Set the initial vertex source mask: The first 6 planes are the bounds * of the view volume; the next 8 planes are the user clipping planes. */ @@ -271,9 +270,12 @@ static void clip_and_emit_line( struct brw_clip_compile *c ) brw_set_conditionalmod(p, BRW_CONDITIONAL_NZ); brw_SHR(p, c->reg.planemask, c->reg.planemask, brw_imm_ud(1)); brw_SHR(p, c->reg.vertex_src_mask, c->reg.vertex_src_mask, brw_imm_ud(1)); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; brw_ADD(p, c->reg.clipdistance_offset, c->reg.clipdistance_offset, brw_imm_w(sizeof(float))); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; } brw_WHILE(p); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; brw_ADD(p, c->reg.t, c->reg.t0, c->reg.t1); brw_CMP(p, vec1(brw_null_reg()), BRW_CONDITIONAL_L, c->reg.t, brw_imm_f(1.0)); diff --git a/src/mesa/drivers/dri/i965/brw_clip_tri.c b/src/mesa/drivers/dri/i965/brw_clip_tri.c index 289f4ccd82a..9118cf79e48 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_tri.c +++ b/src/mesa/drivers/dri/i965/brw_clip_tri.c @@ -407,6 +407,7 @@ void brw_clip_tri( struct brw_clip_compile *c ) brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1)); } brw_WHILE(p); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; /* vtxPrev = *(outlist_ptr-1) OR: outlist[nr_verts-1] * inlist = outlist @@ -485,6 +486,7 @@ void brw_clip_tri_emit_polygon(struct brw_clip_compile *c) brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1)); } brw_WHILE(p); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; brw_clip_emit_vue(c, v0, BRW_URB_WRITE_EOT_COMPLETE, ((_3DPRIM_TRIFAN << URB_WRITE_PRIM_TYPE_SHIFT) diff --git a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c index 164a96560ac..d8deaa49ef3 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_unfilled.c +++ b/src/mesa/drivers/dri/i965/brw_clip_unfilled.c @@ -237,7 +237,7 @@ static void merge_edgeflags( struct brw_clip_compile *c ) brw_varying_to_offset(&c->vue_map, VARYING_SLOT_EDGE)), brw_imm_f(0)); - brw_set_predicate_control(p, BRW_PREDICATE_NONE); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; brw_set_conditionalmod(p, BRW_CONDITIONAL_EQ); brw_AND(p, vec1(brw_null_reg()), get_element_ud(c->reg.R0, 2), brw_imm_ud(1<<9)); @@ -245,7 +245,7 @@ static void merge_edgeflags( struct brw_clip_compile *c ) brw_varying_to_offset(&c->vue_map, VARYING_SLOT_EDGE)), brw_imm_f(0)); - brw_set_predicate_control(p, BRW_PREDICATE_NONE); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; } brw_ENDIF(p); } @@ -295,6 +295,7 @@ static void emit_lines(struct brw_clip_compile *c, brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1)); } brw_WHILE(p); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; } /* v1ptr = &inlist[nr_verts] @@ -333,6 +334,7 @@ static void emit_lines(struct brw_clip_compile *c, brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1)); } brw_WHILE(p); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; } @@ -375,6 +377,7 @@ static void emit_points(struct brw_clip_compile *c, brw_ADD(p, c->reg.loopcount, c->reg.loopcount, brw_imm_d(-1)); } brw_WHILE(p); + brw_last_inst->header.predicate_control = BRW_PREDICATE_NORMAL; } diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 0bf6e3e4534..d31e733e2b1 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -856,7 +856,6 @@ brw_next_insn(struct brw_compile *p, unsigned opcode) if (p->current->header.destreg__conditionalmod) { p->current->header.destreg__conditionalmod = 0; - p->current->header.predicate_control = BRW_PREDICATE_NORMAL; } insn->header.opcode = opcode; |