diff options
| -rw-r--r-- | docs/GL3.txt | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nv50/nv50_screen.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/nouveau/nv50/nv50_surface.c | 16 |
3 files changed, 12 insertions, 8 deletions
diff --git a/docs/GL3.txt b/docs/GL3.txt index 7387ee2ee31..d3743c7b4b7 100644 --- a/docs/GL3.txt +++ b/docs/GL3.txt @@ -153,7 +153,7 @@ GL 4.3, GLSL 4.30: GL_ARB_ES3_compatibility DONE (all drivers that support GLSL 3.30) GL_ARB_clear_buffer_object DONE (all drivers) GL_ARB_compute_shader in progress (jljusten) - GL_ARB_copy_image DONE (i965, nvc0, radeonsi) + GL_ARB_copy_image DONE (i965, nv50, nvc0, radeonsi) GL_KHR_debug DONE (all drivers) GL_ARB_explicit_uniform_location DONE (all drivers that support GLSL) GL_ARB_fragment_layer_viewport DONE (nv50, nvc0, r600, radeonsi, llvmpipe) diff --git a/src/gallium/drivers/nouveau/nv50/nv50_screen.c b/src/gallium/drivers/nouveau/nv50/nv50_screen.c index 2c8884edc2d..bcad90128d2 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_screen.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_screen.c @@ -180,6 +180,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR: case PIPE_CAP_DEPTH_BOUNDS_TEST: case PIPE_CAP_TGSI_TXQS: + case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 1; case PIPE_CAP_SEAMLESS_CUBE_MAP: return 1; /* class_3d >= NVA0_3D_CLASS; */ @@ -217,7 +218,6 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS: case PIPE_CAP_FORCE_PERSAMPLE_INTERP: case PIPE_CAP_SHAREABLE_SHADERS: - case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS: return 0; case PIPE_CAP_VENDOR_ID: diff --git a/src/gallium/drivers/nouveau/nv50/nv50_surface.c b/src/gallium/drivers/nouveau/nv50/nv50_surface.c index 64348b3c378..0b96e528070 100644 --- a/src/gallium/drivers/nouveau/nv50/nv50_surface.c +++ b/src/gallium/drivers/nouveau/nv50/nv50_surface.c @@ -220,10 +220,14 @@ nv50_resource_copy_region(struct pipe_context *pipe, nv04_resource(dst)->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING; if (m2mf) { + struct nv50_miptree *src_mt = nv50_miptree(src); + struct nv50_miptree *dst_mt = nv50_miptree(dst); struct nv50_m2mf_rect drect, srect; unsigned i; - unsigned nx = util_format_get_nblocksx(src->format, src_box->width); - unsigned ny = util_format_get_nblocksy(src->format, src_box->height); + unsigned nx = util_format_get_nblocksx(src->format, src_box->width) + << src_mt->ms_x; + unsigned ny = util_format_get_nblocksy(src->format, src_box->height) + << src_mt->ms_y; nv50_m2mf_rect_setup(&drect, dst, dst_level, dstx, dsty, dstz); nv50_m2mf_rect_setup(&srect, src, src_level, @@ -232,15 +236,15 @@ nv50_resource_copy_region(struct pipe_context *pipe, for (i = 0; i < src_box->depth; ++i) { nv50_m2mf_transfer_rect(nv50, &drect, &srect, nx, ny); - if (nv50_miptree(dst)->layout_3d) + if (dst_mt->layout_3d) drect.z++; else - drect.base += nv50_miptree(dst)->layer_stride; + drect.base += dst_mt->layer_stride; - if (nv50_miptree(src)->layout_3d) + if (src_mt->layout_3d) srect.z++; else - srect.base += nv50_miptree(src)->layer_stride; + srect.base += src_mt->layer_stride; } return; } |