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-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c23
-rw-r--r--src/amd/vulkan/radv_image.c16
-rw-r--r--src/amd/vulkan/radv_private.h7
3 files changed, 8 insertions, 38 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index f3e3de8dafd..30738e38fdb 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1475,10 +1475,10 @@ radv_update_zrange_precision(struct radv_cmd_buffer *cmd_buffer,
!radv_image_is_tc_compat_htile(image))
return;
- if (!radv_layout_has_htile(image, layout, in_render_loop,
- radv_image_queue_family_mask(image,
- cmd_buffer->queue_family_index,
- cmd_buffer->queue_family_index))) {
+ if (!radv_layout_is_htile_compressed(image, layout, in_render_loop,
+ radv_image_queue_family_mask(image,
+ cmd_buffer->queue_family_index,
+ cmd_buffer->queue_family_index))) {
db_z_info &= C_028040_TILE_SURFACE_ENABLE;
}
@@ -1518,10 +1518,10 @@ radv_emit_fb_ds_state(struct radv_cmd_buffer *cmd_buffer,
uint32_t db_z_info = ds->db_z_info;
uint32_t db_stencil_info = ds->db_stencil_info;
- if (!radv_layout_has_htile(image, layout, in_render_loop,
- radv_image_queue_family_mask(image,
- cmd_buffer->queue_family_index,
- cmd_buffer->queue_family_index))) {
+ if (!radv_layout_is_htile_compressed(image, layout, in_render_loop,
+ radv_image_queue_family_mask(image,
+ cmd_buffer->queue_family_index,
+ cmd_buffer->queue_family_index))) {
db_z_info &= C_028040_TILE_SURFACE_ENABLE;
db_stencil_info |= S_028044_TILE_STENCIL_DISABLE(1);
}
@@ -2053,14 +2053,7 @@ radv_emit_framebuffer_state(struct radv_cmd_buffer *cmd_buffer)
VkImageLayout layout = subpass->depth_stencil_attachment->layout;
bool in_render_loop = subpass->depth_stencil_attachment->in_render_loop;
struct radv_image_view *iview = cmd_buffer->state.attachments[idx].iview;
- struct radv_image *image = iview->image;
radv_cs_add_buffer(cmd_buffer->device->ws, cmd_buffer->cs, cmd_buffer->state.attachments[idx].iview->bo);
- ASSERTED uint32_t queue_mask = radv_image_queue_family_mask(image,
- cmd_buffer->queue_family_index,
- cmd_buffer->queue_family_index);
- /* We currently don't support writing decompressed HTILE */
- assert(radv_layout_has_htile(image, layout, in_render_loop, queue_mask) ==
- radv_layout_is_htile_compressed(image, layout, in_render_loop, queue_mask));
radv_emit_fb_ds_state(cmd_buffer, &cmd_buffer->state.attachments[idx].ds, iview, layout, in_render_loop);
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 89925386796..bdd62a9cbf4 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -1743,22 +1743,6 @@ radv_image_view_init(struct radv_image_view *iview,
}
}
-bool radv_layout_has_htile(const struct radv_image *image,
- VkImageLayout layout,
- bool in_render_loop,
- unsigned queue_mask)
-{
- if (radv_image_is_tc_compat_htile(image))
- return layout != VK_IMAGE_LAYOUT_GENERAL;
-
- return radv_image_has_htile(image) &&
- (layout == VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL ||
- layout == VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR ||
- layout == VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR ||
- (layout == VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL &&
- queue_mask == (1u << RADV_QUEUE_GENERAL)));
-}
-
bool radv_layout_is_htile_compressed(const struct radv_image *image,
VkImageLayout layout,
bool in_render_loop,
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index 159266856eb..0dd49959fa3 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -1816,13 +1816,6 @@ struct radv_image {
struct radv_image_plane planes[0];
};
-/* Whether the image has a htile that is known consistent with the contents of
- * the image. */
-bool radv_layout_has_htile(const struct radv_image *image,
- VkImageLayout layout,
- bool in_render_loop,
- unsigned queue_mask);
-
/* Whether the image has a htile that is known consistent with the contents of
* the image and is allowed to be in compressed form.
*