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-rw-r--r--include/pci_ids/iris_pci_ids.h2
-rw-r--r--src/intel/dev/gen_device_info.c12
2 files changed, 14 insertions, 0 deletions
diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h
index ed79c654944..d69fcb9c8d4 100644
--- a/include/pci_ids/iris_pci_ids.h
+++ b/include/pci_ids/iris_pci_ids.h
@@ -15,3 +15,5 @@ CHIPSET(0x9AC0, tgl_gt2, "TGL GT2", "Intel(R) UHD Graphics")
CHIPSET(0x9AC9, tgl_gt2, "TGL GT2", "Intel(R) UHD Graphics")
CHIPSET(0x9AD9, tgl_gt2, "TGL GT2", "Intel(R) UHD Graphics")
CHIPSET(0x9AF8, tgl_gt2, "TGL GT2", "Intel(R) UHD Graphics")
+
+CHIPSET(0x4905, dg1, "DG1 GT2", "Intel(R) Graphics")
diff --git a/src/intel/dev/gen_device_info.c b/src/intel/dev/gen_device_info.c
index 917f493a672..7630bb03b10 100644
--- a/src/intel/dev/gen_device_info.c
+++ b/src/intel/dev/gen_device_info.c
@@ -62,6 +62,7 @@ static const struct {
{ "jsl", 0x4E71 },
{ "tgl", 0x9a49 },
{ "rkl", 0x4c8a },
+ { "dg1", 0x4905 },
};
/**
@@ -1050,6 +1051,17 @@ static const struct gen_device_info gen_device_info_rkl_gt1 = {
GEN12_GT_FEATURES(1),
};
+#define GEN12_DG1_FEATURES \
+ GEN12_GT_FEATURES(2), \
+ .is_dg1 = true, \
+ .has_llc = false, \
+ .urb.size = 768, \
+ .simulator_id = 30
+
+static const struct gen_device_info gen_device_info_dg1 = {
+ GEN12_DG1_FEATURES,
+};
+
static void
gen_device_info_set_eu_mask(struct gen_device_info *devinfo,
unsigned slice,