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-rw-r--r--src/amd/common/ac_nir_to_llvm.c5
-rw-r--r--src/amd/common/ac_shader_abi.h1
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_internal.h1
4 files changed, 5 insertions, 6 deletions
diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 4588feb690e..e44afbb9b22 100644
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -90,7 +90,6 @@ struct nir_to_llvm_context {
LLVMValueRef ring_offsets;
LLVMValueRef push_constants;
LLVMValueRef view_index;
- LLVMValueRef num_work_groups;
LLVMValueRef tg_size;
LLVMValueRef vertex_buffers;
@@ -780,7 +779,7 @@ static void create_function(struct nir_to_llvm_context *ctx,
if (ctx->shader_info->info.cs.uses_grid_size) {
add_arg(&args, ARG_SGPR, ctx->ac.v3i32,
- &ctx->num_work_groups);
+ &ctx->abi.num_work_groups);
}
for (int i = 0; i < 3; i++) {
@@ -4376,7 +4375,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
result = ctx->abi->instance_id;
break;
case nir_intrinsic_load_num_work_groups:
- result = ctx->nctx->num_work_groups;
+ result = ctx->abi->num_work_groups;
break;
case nir_intrinsic_load_local_invocation_index:
result = visit_load_local_invocation_index(ctx->nctx);
diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 55842ea342d..9499c1a15fd 100644
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -56,6 +56,7 @@ struct ac_shader_abi {
LLVMValueRef prim_mask;
/* CS */
LLVMValueRef local_invocation_ids;
+ LLVMValueRef num_work_groups;
LLVMValueRef workgroup_ids[3];
/* For VS and PS: pre-loaded shader inputs.
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index b2ff5b24e68..f7413a2d6f0 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2146,7 +2146,7 @@ void si_load_system_value(struct si_shader_context *ctx,
break;
case TGSI_SEMANTIC_GRID_SIZE:
- value = LLVMGetParam(ctx->main_fn, ctx->param_grid_size);
+ value = ctx->abi.num_work_groups;
break;
case TGSI_SEMANTIC_BLOCK_SIZE:
@@ -4879,7 +4879,7 @@ static void create_function(struct si_shader_context *ctx)
declare_global_desc_pointers(ctx, &fninfo);
declare_per_stage_desc_pointers(ctx, &fninfo, true);
if (shader->selector->info.uses_grid_size)
- ctx->param_grid_size = add_arg(&fninfo, ARG_SGPR, v3i32);
+ add_arg_assign(&fninfo, ARG_SGPR, v3i32, &ctx->abi.num_work_groups);
if (shader->selector->info.uses_block_size)
ctx->param_block_size = add_arg(&fninfo, ARG_SGPR, v3i32);
diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h
index aed6ea07f0b..02d5fc8e379 100644
--- a/src/gallium/drivers/radeonsi/si_shader_internal.h
+++ b/src/gallium/drivers/radeonsi/si_shader_internal.h
@@ -184,7 +184,6 @@ struct si_shader_context {
int param_gs_vtx23_offset; /* in dwords (GFX9) */
int param_gs_vtx45_offset; /* in dwords (GFX9) */
/* CS */
- int param_grid_size;
int param_block_size;
LLVMTargetMachineRef tm;