diff options
74 files changed, 136 insertions, 237 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index b56289c495b..6610ef0ca6b 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp @@ -228,7 +228,7 @@ try_blorp_blit(struct brw_context *brw, GLfloat dstX0, GLfloat dstY0, GLfloat dstX1, GLfloat dstY1, GLenum filter, GLbitfield buffer_bit) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* Sync up the state of window system buffers. We need to do this before * we go looking for the buffers. @@ -345,8 +345,7 @@ brw_blorp_copytexsubimage(struct brw_context *brw, int dstX0, int dstY0, int width, int height) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *src_irb = intel_renderbuffer(src_rb); struct intel_texture_image *intel_image = intel_texture_image(dst_image); @@ -2040,7 +2039,7 @@ brw_blorp_blit_params::brw_blorp_blit_params(struct brw_context *brw, GLfloat dst_x1, GLfloat dst_y1, bool mirror_x, bool mirror_y) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; const struct gl_framebuffer *read_fb = ctx->ReadBuffer; src.set(brw, src_mt, src_level, src_layer); diff --git a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp index cd4c5901906..4ad7e00729b 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp_clear.cpp @@ -183,8 +183,7 @@ brw_blorp_clear_params::brw_blorp_clear_params(struct brw_context *brw, GLubyte *color_mask, bool partial_clear) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *irb = intel_renderbuffer(rb); dst.set(brw, irb->mt, irb->mt_level, irb->mt_layer); @@ -428,7 +427,7 @@ bool brw_blorp_clear_color(struct brw_context *brw, struct gl_framebuffer *fb, bool partial_clear) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* The constant color clear code doesn't work for multisampled surfaces, so * we need to support falling back to other clear mechanisms. diff --git a/src/mesa/drivers/dri/i965/brw_cc.c b/src/mesa/drivers/dri/i965/brw_cc.c index 0b849479d0c..6f85f6355cb 100644 --- a/src/mesa/drivers/dri/i965/brw_cc.c +++ b/src/mesa/drivers/dri/i965/brw_cc.c @@ -41,7 +41,7 @@ static void brw_upload_cc_vp(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct brw_cc_viewport *ccv; ccv = brw_state_batch(brw, AUB_TRACE_CC_VP_STATE, @@ -96,7 +96,7 @@ brw_fix_xRGB_alpha(GLenum function) */ static void upload_cc_unit(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct brw_cc_unit_state *cc; cc = brw_state_batch(brw, AUB_TRACE_CC_STATE, @@ -238,8 +238,7 @@ const struct brw_tracked_state brw_cc_unit = { static void upload_blend_constant_color(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; BEGIN_BATCH(5); OUT_BATCH(_3DSTATE_BLEND_CONSTANT_COLOR << 16 | (5-2)); diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index 216ab9e93a9..cb1c08461bb 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -208,7 +208,6 @@ static void brw_clear(struct gl_context *ctx, GLbitfield mask) { struct brw_context *brw = brw_context(ctx); - struct intel_context *intel = &brw->intel; struct gl_framebuffer *fb = ctx->DrawBuffer; bool partial_clear = ctx->Scissor.Enabled && !noop_scissor(ctx, fb); @@ -248,9 +247,9 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) mask &= ~tri_mask; if (ctx->API == API_OPENGLES) { - _mesa_meta_Clear(&intel->ctx, tri_mask); + _mesa_meta_Clear(&brw->ctx, tri_mask); } else { - _mesa_meta_glsl_Clear(&intel->ctx, tri_mask); + _mesa_meta_glsl_Clear(&brw->ctx, tri_mask); } } diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index 56a8f7c093d..2ebf3f60520 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -134,8 +134,7 @@ static void compile_clip_prog( struct brw_context *brw, static void brw_upload_clip_prog(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct brw_clip_prog_key key; memset(&key, 0, sizeof(key)); diff --git a/src/mesa/drivers/dri/i965/brw_clip_state.c b/src/mesa/drivers/dri/i965/brw_clip_state.c index 96a82a80fcb..bb29daf0f1e 100644 --- a/src/mesa/drivers/dri/i965/brw_clip_state.c +++ b/src/mesa/drivers/dri/i965/brw_clip_state.c @@ -36,8 +36,7 @@ static void upload_clip_vp(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct brw_clipper_viewport *vp; vp = brw_state_batch(brw, AUB_TRACE_CLIP_VP_STATE, @@ -56,8 +55,7 @@ upload_clip_vp(struct brw_context *brw) static void brw_upload_clip_unit(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct brw_clip_unit_state *clip; /* _NEW_BUFFERS */ diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 12f107c5ab2..a72e2269fbf 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -111,8 +111,7 @@ static void brwInitDriverFunctions(struct intel_screen *screen, static void brw_initialize_context_constants(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; ctx->Const.QueryCounterBits.Timestamp = 36; @@ -297,8 +296,7 @@ brwCreateContext(int api, brwInitDriverFunctions(screen, &functions); - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; if (!intelInitContext( brw, api, major_version, minor_version, mesaVis, driContextPriv, diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 4e436f7cde9..86f9f716a2b 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -757,11 +757,11 @@ struct brw_query_object { /** - * brw_context is derived from intel_context. + * brw_context is derived from gl_context. */ struct brw_context { - struct intel_context intel; /**< base class, must be first field */ + struct gl_context ctx; /**< base class, must be first field */ struct { diff --git a/src/mesa/drivers/dri/i965/brw_curbe.c b/src/mesa/drivers/dri/i965/brw_curbe.c index 3b973aae28d..e0b40836b99 100644 --- a/src/mesa/drivers/dri/i965/brw_curbe.c +++ b/src/mesa/drivers/dri/i965/brw_curbe.c @@ -55,7 +55,7 @@ */ static void calculate_curbe_offsets( struct brw_context *brw ) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* CACHE_NEW_WM_PROG */ const GLuint nr_fp_regs = (brw->wm.prog_data->nr_params + 15) / 16; @@ -180,8 +180,7 @@ static GLfloat fixed_plane[6][4] = { static void brw_upload_constant_buffer(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; const GLuint sz = brw->curbe.total_size; const GLuint bufsz = sz * 16 * sizeof(GLfloat); GLfloat *buf; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index ea28d9eaff1..85378315525 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -90,7 +90,7 @@ static const GLenum reduced_prim[GL_POLYGON+1] = { static void brw_set_prim(struct brw_context *brw, const struct _mesa_prim *prim) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; uint32_t hw_prim = prim_to_hw_prim[prim->mode]; DBG("PRIM: %s\n", _mesa_lookup_enum_by_nr(prim->mode)); @@ -299,7 +299,7 @@ static void brw_merge_inputs( struct brw_context *brw, static void brw_predraw_resolve_buffers(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *depth_irb; struct intel_texture_object *tex_obj; @@ -333,7 +333,7 @@ brw_predraw_resolve_buffers(struct brw_context *brw) */ static void brw_postdraw_set_buffers_need_resolve(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; struct intel_renderbuffer *front_irb = NULL; @@ -532,7 +532,7 @@ void brw_draw_prims( struct gl_context *ctx, void brw_draw_init( struct brw_context *brw ) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct vbo_context *vbo = vbo_context(ctx); int i; diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 17a5629de91..2952027ebd7 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -399,7 +399,7 @@ copy_array_to_vbo_array(struct brw_context *brw, static void brw_prepare_vertices(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* CACHE_NEW_VS_PROG */ GLbitfield64 vs_inputs = brw->vs.prog_data->inputs_read; const unsigned char *ptr = NULL; @@ -795,7 +795,7 @@ const struct brw_tracked_state brw_vertices = { static void brw_upload_indices(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; const struct _mesa_index_buffer *index_buffer = brw->ib.ib; GLuint ib_size; drm_intel_bo *bo = NULL; diff --git a/src/mesa/drivers/dri/i965/brw_fs.h b/src/mesa/drivers/dri/i965/brw_fs.h index bcda339f857..0645fb75a78 100644 --- a/src/mesa/drivers/dri/i965/brw_fs.h +++ b/src/mesa/drivers/dri/i965/brw_fs.h @@ -569,7 +569,6 @@ private: void patch_discard_jumps_to_fb_writes(); struct brw_context *brw; - struct intel_context *intel; struct gl_context *ctx; struct brw_compile *p; diff --git a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp index 9851a69ad65..422592225c9 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_emit.cpp @@ -44,8 +44,7 @@ fs_generator::fs_generator(struct brw_context *brw, : brw(brw), c(c), prog(prog), fp(fp), dual_source_output(dual_source_output) { - intel = &brw->intel; - ctx = &intel->ctx; + ctx = &brw->ctx; shader = prog ? prog->_LinkedShaders[MESA_SHADER_FRAGMENT] : NULL; diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp index 387a91a58ed..fc7ae582990 100644 --- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp @@ -2433,8 +2433,7 @@ fs_visitor::fs_visitor(struct brw_context *brw, this->brw = brw; this->fp = fp; this->shader_prog = shader_prog; - this->intel = &brw->intel; - this->ctx = &intel->ctx; + this->ctx = &brw->ctx; this->mem_ctx = ralloc_context(NULL); if (shader_prog) shader = (struct brw_shader *) diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 1a3d1884b89..bd32db1e4f1 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -160,7 +160,7 @@ static void populate_key( struct brw_context *brw, BRW_SWIZZLE4(3, 3, 3, 3) }; - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; memset(key, 0, sizeof(*key)); diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 2be9c3d385b..0ab1e76b3ce 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -46,8 +46,7 @@ /* Constant single cliprect for framebuffer object or DRI2 drawing */ static void upload_drawing_rect(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; BEGIN_BATCH(4); OUT_BATCH(_3DSTATE_DRAWING_RECTANGLE << 16 | (4 - 2)); @@ -197,8 +196,7 @@ const struct brw_tracked_state brw_psp_urb_cbs = { uint32_t brw_depthbuffer_format(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; struct intel_renderbuffer *drb = intel_get_renderbuffer(fb, BUFFER_DEPTH); struct intel_renderbuffer *srb; @@ -327,8 +325,7 @@ void brw_workaround_depthstencil_alignment(struct brw_context *brw, GLbitfield clear_mask) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; bool rebase_depth = false; bool rebase_stencil = false; @@ -559,8 +556,7 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw, void brw_emit_depthbuffer(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb = ctx->DrawBuffer; /* _NEW_BUFFERS */ struct intel_renderbuffer *depth_irb = intel_get_renderbuffer(fb, BUFFER_DEPTH); @@ -801,7 +797,7 @@ const struct brw_tracked_state brw_depthbuffer = { static void upload_polygon_stipple(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; GLuint i; /* _NEW_POLYGON */ @@ -849,7 +845,7 @@ const struct brw_tracked_state brw_polygon_stipple = { static void upload_polygon_stipple_offset(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* _NEW_POLYGON */ if (!ctx->Polygon.StippleFlag) @@ -891,7 +887,7 @@ const struct brw_tracked_state brw_polygon_stipple_offset = { */ static void upload_aa_line_parameters(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; if (!ctx->Line.SmoothFlag || !brw->has_aa_line_parameters) return; @@ -921,7 +917,7 @@ const struct brw_tracked_state brw_aa_line_parameters = { static void upload_line_stipple(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; GLfloat tmp; GLint tmpi; diff --git a/src/mesa/drivers/dri/i965/brw_primitive_restart.c b/src/mesa/drivers/dri/i965/brw_primitive_restart.c index 2af9d32dc45..0dbc48fe3ef 100644 --- a/src/mesa/drivers/dri/i965/brw_primitive_restart.c +++ b/src/mesa/drivers/dri/i965/brw_primitive_restart.c @@ -183,8 +183,7 @@ brw_handle_primitive_restart(struct gl_context *ctx, static void haswell_upload_cut_index(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* Don't trigger on Ivybridge */ if (!brw->is_haswell) diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c index 97d23b3ace3..bb9676be8a5 100644 --- a/src/mesa/drivers/dri/i965/brw_program.c +++ b/src/mesa/drivers/dri/i965/brw_program.c @@ -487,7 +487,7 @@ brw_get_shader_time_index(struct brw_context *brw, struct gl_program *prog, enum shader_time_shader_type type) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; int shader_time_index = brw->shader_time.num_entries++; assert(shader_time_index < brw->shader_time.max_entries); diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index 127720f33aa..2d6dd1ebfd0 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -456,7 +456,7 @@ ensure_bo_has_space(struct gl_context *ctx, struct brw_query_object *query) void brw_emit_query_begin(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct brw_query_object *query = brw->query.obj; if (brw->hw_ctx) diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 1943388c4ad..d73973c1dd4 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -134,7 +134,7 @@ static void compile_sf_prog( struct brw_context *brw, static void brw_upload_sf_prog(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct brw_sf_prog_key key; /* _NEW_BUFFERS */ bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); diff --git a/src/mesa/drivers/dri/i965/brw_sf_state.c b/src/mesa/drivers/dri/i965/brw_sf_state.c index 7752cb51933..4bed5503ff1 100644 --- a/src/mesa/drivers/dri/i965/brw_sf_state.c +++ b/src/mesa/drivers/dri/i965/brw_sf_state.c @@ -41,8 +41,7 @@ static void upload_sf_vp(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; struct brw_sf_viewport *sfv; GLfloat y_scale, y_bias; @@ -126,8 +125,7 @@ const struct brw_tracked_state brw_sf_vp = { static void upload_sf_unit( struct brw_context *brw ) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct brw_sf_unit_state *sf; drm_intel_bo *bo = brw->batch.bo; int chipset_max_threads; diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h index 817dc2613b0..e7d3fb6e019 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.h +++ b/src/mesa/drivers/dri/i965/brw_shader.h @@ -54,7 +54,6 @@ class backend_visitor : public ir_visitor { public: struct brw_context *brw; - struct intel_context *intel; struct gl_context *ctx; struct brw_shader *shader; struct gl_shader_program *shader_prog; diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c index e7d88377a77..c9ba7813f5a 100644 --- a/src/mesa/drivers/dri/i965/brw_state_upload.c +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c @@ -440,8 +440,7 @@ brw_print_dirty_count(struct dirty_bit_map *bit_map) */ void brw_upload_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; - struct intel_context *intel = &brw->intel; + struct gl_context *ctx = &brw->ctx; struct brw_state_flags *state = &brw->state.dirty; int i; static int dirty_count = 0; diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c index 2f23296d4bd..0d8d805621e 100644 --- a/src/mesa/drivers/dri/i965/brw_surface_formats.c +++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c @@ -527,7 +527,7 @@ brw_format_for_mesa_format(gl_format mesa_format) void brw_init_surface_formats(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; int gen; gl_format format; @@ -686,7 +686,7 @@ translate_tex_format(struct brw_context *brw, GLenum depth_mode, GLenum srgb_decode) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; if (srgb_decode == GL_SKIP_DECODE_EXT) mesa_format = _mesa_get_srgb_format_linear(mesa_format); diff --git a/src/mesa/drivers/dri/i965/brw_tex.c b/src/mesa/drivers/dri/i965/brw_tex.c index 2393709a0f2..1ddf1965b1c 100644 --- a/src/mesa/drivers/dri/i965/brw_tex.c +++ b/src/mesa/drivers/dri/i965/brw_tex.c @@ -44,7 +44,7 @@ */ void brw_validate_textures( struct brw_context *brw ) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; int i; for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { diff --git a/src/mesa/drivers/dri/i965/brw_vec4.h b/src/mesa/drivers/dri/i965/brw_vec4.h index dd00ace10d2..407d8b60485 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4.h +++ b/src/mesa/drivers/dri/i965/brw_vec4.h @@ -587,7 +587,6 @@ private: struct brw_reg offset); struct brw_context *brw; - struct intel_context *intel; struct gl_context *ctx; struct brw_compile *p; diff --git a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp index a4c96452bb5..c82af0e79a3 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_emit.cpp @@ -140,8 +140,6 @@ vec4_generator::vec4_generator(struct brw_context *brw, : brw(brw), shader_prog(shader_prog), prog(prog), mem_ctx(mem_ctx), debug_flag(debug_flag) { - intel = &brw->intel; - shader = shader_prog ? shader_prog->_LinkedShaders[MESA_SHADER_VERTEX] : NULL; p = rzalloc(mem_ctx, struct brw_compile); diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 13c10718b7a..3eb43a87750 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -3224,8 +3224,7 @@ vec4_visitor::vec4_visitor(struct brw_context *brw, : debug_flag(debug_flag) { this->brw = brw; - this->intel = &brw->intel; - this->ctx = &intel->ctx; + this->ctx = &brw->ctx; this->shader_prog = shader_prog; this->shader = shader; diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 99784c9a63d..60b40c5cf45 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -403,7 +403,7 @@ brw_vs_debug_recompile(struct brw_context *brw, static void brw_upload_vs_prog(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct brw_vs_prog_key key; /* BRW_NEW_VERTEX_PROGRAM */ struct brw_vertex_program *vp = diff --git a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c index 7ed72c3606c..eaeff956769 100644 --- a/src/mesa/drivers/dri/i965/brw_vs_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_vs_surface_state.c @@ -52,7 +52,7 @@ brw_upload_vs_pull_constants(struct brw_context *brw) /* Updates the ParamaterValues[i] pointers for all parameters of the * basic type of PROGRAM_STATE_VAR. */ - _mesa_load_state_parameters(&brw->intel.ctx, vp->program.Base.Parameters); + _mesa_load_state_parameters(&brw->ctx, vp->program.Base.Parameters); /* CACHE_NEW_VS_PROG */ if (!brw->vs.prog_data->base.nr_pull_params) { @@ -108,7 +108,7 @@ const struct brw_tracked_state brw_vs_pull_constants = { static void brw_upload_vs_ubo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ struct gl_shader_program *prog = ctx->Shader.CurrentVertexProgram; diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index 51f990d90df..10ca5ff84a5 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -348,7 +348,7 @@ brw_populate_sampler_prog_key_data(struct gl_context *ctx, static void brw_wm_populate_key( struct brw_context *brw, struct brw_wm_prog_key *key ) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ const struct brw_fragment_program *fp = (struct brw_fragment_program *)brw->fragment_program; @@ -475,8 +475,7 @@ static void brw_wm_populate_key( struct brw_context *brw, static void brw_upload_wm_prog(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct brw_wm_prog_key key; struct brw_fragment_program *fp = (struct brw_fragment_program *) brw->fragment_program; diff --git a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c index 4b171d58ff7..5457671b19f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_sampler_state.c @@ -82,8 +82,7 @@ void upload_default_color(struct brw_context *brw, struct gl_sampler_object *sampler, int unit, int ss_index) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *texObj = texUnit->_Current; struct gl_texture_image *firstImage = texObj->Image[0][texObj->BaseLevel]; @@ -195,8 +194,7 @@ static void brw_update_sampler_state(struct brw_context *brw, int ss_index, struct brw_sampler_state *sampler) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *texObj = texUnit->_Current; struct gl_sampler_object *gl_sampler = _mesa_get_samplerobj(ctx, unit); @@ -367,7 +365,7 @@ static void brw_update_sampler_state(struct brw_context *brw, static void brw_upload_samplers(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct brw_sampler_state *samplers; /* BRW_NEW_VERTEX_PROGRAM and BRW_NEW_FRAGMENT_PROGRAM */ diff --git a/src/mesa/drivers/dri/i965/brw_wm_state.c b/src/mesa/drivers/dri/i965/brw_wm_state.c index 660b03247f2..f221846f0c8 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_state.c @@ -44,7 +44,7 @@ bool brw_color_buffer_write_enabled(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; const struct gl_fragment_program *fp = brw->fragment_program; int i; @@ -73,8 +73,7 @@ brw_color_buffer_write_enabled(struct brw_context *brw) static void brw_upload_wm_unit(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; const struct gl_fragment_program *fp = brw->fragment_program; struct brw_wm_unit_state *wm; diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index 3b67bd2884e..c678919cc15 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -451,7 +451,7 @@ brw_update_sol_surface(struct brw_context *brw, static void brw_upload_wm_pull_constants(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ struct brw_fragment_program *fp = (struct brw_fragment_program *) brw->fragment_program; @@ -523,7 +523,7 @@ brw_update_null_renderbuffer_surface(struct brw_context *brw, unsigned int unit) * * - Surface Format must be R8G8B8A8_UNORM. */ - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; uint32_t *surf; unsigned surface_type = BRW_SURFACE_NULL; drm_intel_bo *bo = NULL; @@ -604,7 +604,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, bool layered, unsigned int unit) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *irb = intel_renderbuffer(rb); struct intel_mipmap_tree *mt = irb->mt; struct intel_region *region; @@ -705,7 +705,7 @@ brw_update_renderbuffer_surface(struct brw_context *brw, static void brw_update_renderbuffer_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; GLuint i; /* _NEW_BUFFERS | _NEW_COLOR */ @@ -750,7 +750,7 @@ const struct brw_tracked_state gen6_renderbuffer_surfaces = { static void brw_update_texture_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_VERTEX_PROGRAM and BRW_NEW_FRAGMENT_PROGRAM: * Unfortunately, we're stuck using the gl_program structs until the @@ -809,7 +809,7 @@ brw_upload_ubo_surfaces(struct brw_context *brw, struct gl_shader *shader, uint32_t *surf_offsets) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; if (!shader) return; @@ -839,7 +839,7 @@ brw_upload_ubo_surfaces(struct brw_context *brw, static void brw_upload_wm_ubo_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* _NEW_PROGRAM */ struct gl_shader_program *prog = ctx->Shader._CurrentFragmentProgram; diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index 7355d31f535..05b4ced42e6 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -49,7 +49,7 @@ void gen6_blorp_emit_batch_head(struct brw_context *brw, const brw_blorp_params *params) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* To ensure that the batch contains only the resolve, flush the batch * before beginning and after finishing emitting the resolve packets. @@ -813,7 +813,7 @@ static void gen6_blorp_emit_depth_stencil_config(struct brw_context *brw, const brw_blorp_params *params) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; uint32_t draw_x = params->depth.x_offset; uint32_t draw_y = params->depth.y_offset; uint32_t tile_mask_x, tile_mask_y; diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.h b/src/mesa/drivers/dri/i965/gen6_blorp.h index 429cd4d1a34..1b273a49e3a 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.h +++ b/src/mesa/drivers/dri/i965/gen6_blorp.h @@ -29,7 +29,6 @@ extern "C" { #endif -struct intel_context; struct intel_mipmap_tree; #ifdef __cplusplus diff --git a/src/mesa/drivers/dri/i965/gen6_cc.c b/src/mesa/drivers/dri/i965/gen6_cc.c index cac32e5a053..45c926cca83 100644 --- a/src/mesa/drivers/dri/i965/gen6_cc.c +++ b/src/mesa/drivers/dri/i965/gen6_cc.c @@ -39,7 +39,7 @@ static void gen6_upload_blend_state(struct brw_context *brw) { bool is_buffer_zero_integer_format = false; - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gen6_blend_state *blend; int b; int nr_draw_buffers = ctx->DrawBuffer->_NumColorDrawBuffers; @@ -253,7 +253,7 @@ const struct brw_tracked_state gen6_blend_state = { static void gen6_upload_color_calc_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gen6_color_calc_state *cc; cc = brw_state_batch(brw, AUB_TRACE_CC_STATE, diff --git a/src/mesa/drivers/dri/i965/gen6_clip_state.c b/src/mesa/drivers/dri/i965/gen6_clip_state.c index a05e42df73e..08b57c762ea 100644 --- a/src/mesa/drivers/dri/i965/gen6_clip_state.c +++ b/src/mesa/drivers/dri/i965/gen6_clip_state.c @@ -35,8 +35,7 @@ static void upload_clip_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; uint32_t dw1 = brw->meta_in_progress ? 0 : GEN6_CLIP_STATISTICS_ENABLE; uint32_t dw2 = 0; diff --git a/src/mesa/drivers/dri/i965/gen6_depthstencil.c b/src/mesa/drivers/dri/i965/gen6_depthstencil.c index 01710180087..7b06c1e90f9 100644 --- a/src/mesa/drivers/dri/i965/gen6_depthstencil.c +++ b/src/mesa/drivers/dri/i965/gen6_depthstencil.c @@ -34,7 +34,7 @@ static void gen6_upload_depth_stencil_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gen6_depth_stencil_state *ds; struct intel_renderbuffer *depth_irb; diff --git a/src/mesa/drivers/dri/i965/gen6_multisample_state.c b/src/mesa/drivers/dri/i965/gen6_multisample_state.c index ce0fdfc87dd..268dc7998c4 100644 --- a/src/mesa/drivers/dri/i965/gen6_multisample_state.c +++ b/src/mesa/drivers/dri/i965/gen6_multisample_state.c @@ -164,7 +164,7 @@ gen6_emit_3dstate_sample_mask(struct brw_context *brw, static void upload_multisample_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; float coverage = 1.0; float coverage_invert = false; unsigned sample_mask = ~0u; diff --git a/src/mesa/drivers/dri/i965/gen6_scissor_state.c b/src/mesa/drivers/dri/i965/gen6_scissor_state.c index 4c7f81c1dd3..7b92b7cb176 100644 --- a/src/mesa/drivers/dri/i965/gen6_scissor_state.c +++ b/src/mesa/drivers/dri/i965/gen6_scissor_state.c @@ -34,8 +34,7 @@ static void gen6_upload_scissor_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); struct gen6_scissor_rect *scissor; uint32_t scissor_state_offset; diff --git a/src/mesa/drivers/dri/i965/gen6_sf_state.c b/src/mesa/drivers/dri/i965/gen6_sf_state.c index 76d1317cec8..c76debeff30 100644 --- a/src/mesa/drivers/dri/i965/gen6_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen6_sf_state.c @@ -126,8 +126,7 @@ get_attr_override(const struct brw_vue_map *vue_map, int urb_entry_read_offset, static void upload_sf_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ uint32_t num_outputs = _mesa_bitcount_64(brw->fragment_program->Base.InputsRead); /* _NEW_LIGHT */ diff --git a/src/mesa/drivers/dri/i965/gen6_sol.c b/src/mesa/drivers/dri/i965/gen6_sol.c index cf945fd3d5b..5c294b1d768 100644 --- a/src/mesa/drivers/dri/i965/gen6_sol.c +++ b/src/mesa/drivers/dri/i965/gen6_sol.c @@ -36,7 +36,7 @@ static void gen6_update_sol_surfaces(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_TRANSFORM_FEEDBACK */ struct gl_transform_feedback_object *xfb_obj = ctx->TransformFeedback.CurrentObject; @@ -85,7 +85,7 @@ const struct brw_tracked_state gen6_sol_surface = { static void brw_gs_upload_binding_table(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_VERTEX_PROGRAM */ const struct gl_shader_program *shaderprog = ctx->Shader.CurrentVertexProgram; diff --git a/src/mesa/drivers/dri/i965/gen6_viewport_state.c b/src/mesa/drivers/dri/i965/gen6_viewport_state.c index b6dbd7788c8..033592035f9 100644 --- a/src/mesa/drivers/dri/i965/gen6_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen6_viewport_state.c @@ -37,7 +37,7 @@ static void gen6_upload_clip_vp(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct brw_clipper_viewport *vp; vp = brw_state_batch(brw, AUB_TRACE_CLIP_VP_STATE, @@ -78,7 +78,7 @@ const struct brw_tracked_state gen6_clip_vp = { static void gen6_upload_sf_vp(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; struct brw_sf_viewport *sfv; GLfloat y_scale, y_bias; diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c index a5e7cc98fb8..7c459b40719 100644 --- a/src/mesa/drivers/dri/i965/gen6_vs_state.c +++ b/src/mesa/drivers/dri/i965/gen6_vs_state.c @@ -36,8 +36,7 @@ static void gen6_upload_vs_push_constants(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* _BRW_NEW_VERTEX_PROGRAM */ const struct brw_vertex_program *vp = brw_vertex_program_const(brw->vertex_program); @@ -99,7 +98,7 @@ const struct brw_tracked_state gen6_vs_push_constants = { static void upload_vs_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; uint32_t floating_point_mode = 0; /* From the BSpec, Volume 2a, Part 3 "Vertex Shader", Section diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c index 5cc0a61a403..24c96ccc1a1 100644 --- a/src/mesa/drivers/dri/i965/gen6_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c @@ -37,8 +37,7 @@ static void gen6_upload_wm_push_constants(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ const struct brw_fragment_program *fp = brw_fragment_program_const(brw->fragment_program); @@ -92,8 +91,7 @@ const struct brw_tracked_state gen6_wm_push_constants = { static void upload_wm_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; const struct brw_fragment_program *fp = brw_fragment_program_const(brw->fragment_program); uint32_t dw2, dw4, dw5, dw6; diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.cpp b/src/mesa/drivers/dri/i965/gen7_blorp.cpp index 102118f874c..acd62371414 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen7_blorp.cpp @@ -653,7 +653,7 @@ static void gen7_blorp_emit_depth_stencil_config(struct brw_context *brw, const brw_blorp_params *params) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; uint32_t draw_x = params->depth.x_offset; uint32_t draw_y = params->depth.y_offset; uint32_t tile_mask_x, tile_mask_y; diff --git a/src/mesa/drivers/dri/i965/gen7_blorp.h b/src/mesa/drivers/dri/i965/gen7_blorp.h index 7517b6cce0a..64434309f82 100644 --- a/src/mesa/drivers/dri/i965/gen7_blorp.h +++ b/src/mesa/drivers/dri/i965/gen7_blorp.h @@ -29,7 +29,6 @@ extern "C" { #endif -struct intel_context; struct intel_mipmap_tree; #ifdef __cplusplus diff --git a/src/mesa/drivers/dri/i965/gen7_clip_state.c b/src/mesa/drivers/dri/i965/gen7_clip_state.c index aae78953a81..36a793c6fb5 100644 --- a/src/mesa/drivers/dri/i965/gen7_clip_state.c +++ b/src/mesa/drivers/dri/i965/gen7_clip_state.c @@ -31,8 +31,7 @@ static void upload_clip_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; uint32_t dw1 = 0, dw2 = 0; /* _NEW_BUFFERS */ diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index 4f6b20d6b3b..fe63fefbfd9 100644 --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c @@ -39,8 +39,7 @@ gen7_emit_depth_stencil_hiz(struct brw_context *brw, uint32_t width, uint32_t height, uint32_t tile_x, uint32_t tile_y) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; intel_emit_depth_stall_flushes(brw); diff --git a/src/mesa/drivers/dri/i965/gen7_sampler_state.c b/src/mesa/drivers/dri/i965/gen7_sampler_state.c index 1fb947f80c8..7ce58ce2a4a 100644 --- a/src/mesa/drivers/dri/i965/gen7_sampler_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sampler_state.c @@ -36,8 +36,7 @@ static void gen7_update_sampler_state(struct brw_context *brw, int unit, int ss_index, struct gen7_sampler_state *sampler) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; struct gl_texture_object *texObj = texUnit->_Current; struct gl_sampler_object *gl_sampler = _mesa_get_samplerobj(ctx, unit); @@ -187,7 +186,7 @@ gen7_update_sampler_state(struct brw_context *brw, int unit, int ss_index, static void gen7_upload_samplers(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gen7_sampler_state *samplers; /* BRW_NEW_VERTEX_PROGRAM and BRW_NEW_FRAGMENT_PROGRAM */ diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c index 98526870a3c..0ff33888c79 100644 --- a/src/mesa/drivers/dri/i965/gen7_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c @@ -32,8 +32,7 @@ static void upload_sbe_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_FRAGMENT_PROGRAM */ uint32_t num_outputs = _mesa_bitcount_64(brw->fragment_program->Base.InputsRead); /* _NEW_LIGHT */ @@ -158,8 +157,7 @@ const struct brw_tracked_state gen7_sbe_state = { static void upload_sf_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; uint32_t dw1, dw2, dw3; float point_size; /* _NEW_BUFFERS */ diff --git a/src/mesa/drivers/dri/i965/gen7_sol_state.c b/src/mesa/drivers/dri/i965/gen7_sol_state.c index ff14c2f4a6b..034efe80e85 100644 --- a/src/mesa/drivers/dri/i965/gen7_sol_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sol_state.c @@ -38,8 +38,7 @@ static void upload_3dstate_so_buffers(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_VERTEX_PROGRAM */ const struct gl_shader_program *vs_prog = ctx->Shader.CurrentVertexProgram; @@ -102,8 +101,7 @@ static void upload_3dstate_so_decl_list(struct brw_context *brw, const struct brw_vue_map *vue_map) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_VERTEX_PROGRAM */ const struct gl_shader_program *vs_prog = ctx->Shader.CurrentVertexProgram; @@ -178,8 +176,7 @@ static void upload_3dstate_streamout(struct brw_context *brw, bool active, const struct brw_vue_map *vue_map) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_TRANSFORM_FEEDBACK */ struct gl_transform_feedback_object *xfb_obj = ctx->TransformFeedback.CurrentObject; @@ -223,8 +220,7 @@ upload_3dstate_streamout(struct brw_context *brw, bool active, static void upload_sol_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* BRW_NEW_TRANSFORM_FEEDBACK */ bool active = _mesa_is_xfb_active_and_unpaused(ctx); diff --git a/src/mesa/drivers/dri/i965/gen7_viewport_state.c b/src/mesa/drivers/dri/i965/gen7_viewport_state.c index ecd7922e757..8c5fcac2b22 100644 --- a/src/mesa/drivers/dri/i965/gen7_viewport_state.c +++ b/src/mesa/drivers/dri/i965/gen7_viewport_state.c @@ -30,8 +30,7 @@ static void gen7_upload_sf_clip_viewport(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; const GLfloat depth_scale = 1.0F / ctx->DrawBuffer->_DepthMaxF; GLfloat y_scale, y_bias; const bool render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer); diff --git a/src/mesa/drivers/dri/i965/gen7_vs_state.c b/src/mesa/drivers/dri/i965/gen7_vs_state.c index 37e5c8b075b..7369a9c7cfc 100644 --- a/src/mesa/drivers/dri/i965/gen7_vs_state.c +++ b/src/mesa/drivers/dri/i965/gen7_vs_state.c @@ -32,7 +32,7 @@ static void upload_vs_state(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; uint32_t floating_point_mode = 0; const int max_threads_shift = brw->is_haswell ? HSW_VS_MAX_THREADS_SHIFT : GEN6_VS_MAX_THREADS_SHIFT; diff --git a/src/mesa/drivers/dri/i965/gen7_wm_state.c b/src/mesa/drivers/dri/i965/gen7_wm_state.c index a44766606a6..8f9037136a6 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_state.c @@ -34,8 +34,7 @@ static void upload_wm_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; const struct brw_fragment_program *fp = brw_fragment_program_const(brw->fragment_program); bool writes_depth = false; @@ -112,8 +111,7 @@ const struct brw_tracked_state gen7_wm_state = { static void upload_ps_state(struct brw_context *brw) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; uint32_t dw2, dw4, dw5; const int max_threads_shift = brw->is_haswell ? HSW_PS_MAX_THREADS_SHIFT : IVB_PS_MAX_THREADS_SHIFT; diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c index e1690a79827..8c54152c014 100644 --- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c @@ -236,7 +236,6 @@ gen7_update_buffer_texture_surface(struct gl_context *ctx, unsigned surf_index) { struct brw_context *brw = brw_context(ctx); - struct intel_context *intel = &brw->intel; struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; struct intel_buffer_object *intel_obj = intel_buffer_object(tObj->BufferObject); @@ -289,7 +288,6 @@ gen7_update_texture_surface(struct gl_context *ctx, unsigned surf_index) { struct brw_context *brw = brw_context(ctx); - struct intel_context *intel = &brw->intel; struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; struct intel_texture_object *intelObj = intel_texture_object(tObj); struct intel_mipmap_tree *mt = intelObj->mt; @@ -388,7 +386,6 @@ gen7_create_constant_surface(struct brw_context *brw, uint32_t *out_offset, bool dword_pitch) { - struct intel_context *intel = &brw->intel; uint32_t stride = dword_pitch ? 4 : 16; uint32_t elements = ALIGN(size, stride) / stride; const GLint w = elements - 1; @@ -435,7 +432,6 @@ gen7_create_constant_surface(struct brw_context *brw, void gen7_create_shader_time_surface(struct brw_context *brw, uint32_t *out_offset) { - struct intel_context *intel = &brw->intel; const int w = brw->shader_time.bo->size - 1; uint32_t *surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, @@ -488,8 +484,7 @@ gen7_update_null_renderbuffer_surface(struct brw_context *brw, unsigned unit) * depth buffer’s corresponding state for all render target surfaces, * including null. */ - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* _NEW_BUFFERS */ const struct gl_framebuffer *fb = ctx->DrawBuffer; @@ -523,8 +518,7 @@ gen7_update_renderbuffer_surface(struct brw_context *brw, bool layered, unsigned int unit) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct intel_renderbuffer *irb = intel_renderbuffer(rb); struct intel_region *region = irb->mt->region; uint32_t format; diff --git a/src/mesa/drivers/dri/i965/intel_blit.c b/src/mesa/drivers/dri/i965/intel_blit.c index 1f08fbfa7fb..8cb8c73b076 100644 --- a/src/mesa/drivers/dri/i965/intel_blit.c +++ b/src/mesa/drivers/dri/i965/intel_blit.c @@ -482,8 +482,7 @@ intel_emit_linear_blit(struct brw_context *brw, unsigned int src_offset, unsigned int size) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; GLuint pitch, height; bool ok; diff --git a/src/mesa/drivers/dri/i965/intel_buffer_objects.h b/src/mesa/drivers/dri/i965/intel_buffer_objects.h index d320208ed85..9a36fd30e69 100644 --- a/src/mesa/drivers/dri/i965/intel_buffer_objects.h +++ b/src/mesa/drivers/dri/i965/intel_buffer_objects.h @@ -31,7 +31,6 @@ #include "main/mtypes.h" struct brw_context; -struct intel_context; struct gl_buffer_object; diff --git a/src/mesa/drivers/dri/i965/intel_buffers.c b/src/mesa/drivers/dri/i965/intel_buffers.c index 4ee5a8fc2c9..2a4c9ca1a4f 100644 --- a/src/mesa/drivers/dri/i965/intel_buffers.c +++ b/src/mesa/drivers/dri/i965/intel_buffers.c @@ -41,7 +41,7 @@ void intel_check_front_buffer_rendering(struct brw_context *brw) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; const struct gl_framebuffer *fb = ctx->DrawBuffer; if (_mesa_is_winsys_fbo(fb)) { /* drawing to window system buffer */ diff --git a/src/mesa/drivers/dri/i965/intel_buffers.h b/src/mesa/drivers/dri/i965/intel_buffers.h index 4f115f7c227..10041b435d4 100644 --- a/src/mesa/drivers/dri/i965/intel_buffers.h +++ b/src/mesa/drivers/dri/i965/intel_buffers.h @@ -33,7 +33,6 @@ #include "drm.h" #include "brw_context.h" -struct intel_context; struct intel_framebuffer; extern void intel_check_front_buffer_rendering(struct brw_context *brw); diff --git a/src/mesa/drivers/dri/i965/intel_context.c b/src/mesa/drivers/dri/i965/intel_context.c index 86bbd6113cb..742bcc35433 100644 --- a/src/mesa/drivers/dri/i965/intel_context.c +++ b/src/mesa/drivers/dri/i965/intel_context.c @@ -181,7 +181,6 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) struct gl_framebuffer *fb = drawable->driverPrivate; struct intel_renderbuffer *rb; struct brw_context *brw = context->driverPrivate; - struct intel_context *intel = &brw->intel; __DRIbuffer *buffers = NULL; int i, count; const char *region_name; @@ -231,7 +230,7 @@ intel_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) intel_process_dri2_buffer(brw, drawable, &buffers[i], rb, region_name); } - driUpdateFramebufferSize(&intel->ctx, drawable); + driUpdateFramebufferSize(&brw->ctx, drawable); } /** @@ -437,8 +436,7 @@ intelInitContext(struct brw_context *brw, struct dd_function_table *functions, unsigned *dri_ctx_error) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_context *shareCtx = (struct gl_context *) sharedContextPrivate; __DRIscreen *sPriv = driContextPriv->driScreenPriv; struct intel_screen *intelScreen = sPriv->driverPrivate; @@ -463,7 +461,7 @@ intelInitContext(struct brw_context *brw, brw->intelScreen = intelScreen; - if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx, + if (!_mesa_initialize_context(&brw->ctx, api, mesaVis, shareCtx, functions)) { *dri_ctx_error = __DRI_CTX_ERROR_NO_MEMORY; printf("%s: failed to init mesa context\n", __FUNCTION__); @@ -604,29 +602,28 @@ intelDestroyContext(__DRIcontext * driContextPriv) { struct brw_context *brw = (struct brw_context *) driContextPriv->driverPrivate; - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; - assert(intel); /* should never be null */ - if (intel) { + assert(brw); /* should never be null */ + if (brw) { /* Dump a final BMP in case the application doesn't call SwapBuffers */ if (INTEL_DEBUG & DEBUG_AUB) { intel_batchbuffer_flush(brw); - aub_dump_bmp(&intel->ctx); + aub_dump_bmp(&brw->ctx); } - _mesa_meta_free(&intel->ctx); + _mesa_meta_free(&brw->ctx); brw->vtbl.destroy(brw); if (ctx->swrast_context) { - _swsetup_DestroyContext(&intel->ctx); - _tnl_DestroyContext(&intel->ctx); + _swsetup_DestroyContext(&brw->ctx); + _tnl_DestroyContext(&brw->ctx); } - _vbo_DestroyContext(&intel->ctx); + _vbo_DestroyContext(&brw->ctx); if (ctx->swrast_context) - _swrast_DestroyContext(&intel->ctx); + _swrast_DestroyContext(&brw->ctx); intel_batchbuffer_free(brw); @@ -636,7 +633,7 @@ intelDestroyContext(__DRIcontext * driContextPriv) driDestroyOptionCache(&brw->optionCache); /* free the Mesa context */ - _mesa_free_context_data(&intel->ctx); + _mesa_free_context_data(&brw->ctx); ralloc_free(brw); driContextPriv->driverPrivate = NULL; @@ -684,8 +681,7 @@ static void intel_gles3_srgb_workaround(struct brw_context *brw, struct gl_framebuffer *fb) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; if (_mesa_is_desktop_gl(ctx) || !fb->Visual.sRGBCapable) return; @@ -723,10 +719,8 @@ intelMakeCurrent(__DRIcontext * driContextPriv, _mesa_flush(curCtx); } - struct intel_context *intel = &brw->intel; - if (driContextPriv) { - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_framebuffer *fb, *readFb; if (driDrawPriv == NULL && driReadPriv == NULL) { @@ -775,7 +769,6 @@ intel_query_dri2_buffers(struct brw_context *brw, __DRIbuffer **buffers, int *buffer_count) { - struct intel_context *intel = &brw->intel; __DRIscreen *screen = brw->intelScreen->driScrnPriv; struct gl_framebuffer *fb = drawable->driverPrivate; int i = 0; @@ -797,8 +790,8 @@ intel_query_dri2_buffers(struct brw_context *brw, * query, we need to make sure all the pending drawing has landed in the * real front buffer. */ - intel_flush(&intel->ctx); - intel_flush_front(&intel->ctx); + intel_flush(&brw->ctx); + intel_flush_front(&brw->ctx); attachments[i++] = __DRI_BUFFER_FRONT_LEFT; attachments[i++] = intel_bits_per_pixel(front_rb); @@ -809,8 +802,8 @@ intel_query_dri2_buffers(struct brw_context *brw, * So before doing the query, make sure all the pending drawing has * landed in the real front buffer. */ - intel_flush(&intel->ctx); - intel_flush_front(&intel->ctx); + intel_flush(&brw->ctx); + intel_flush_front(&brw->ctx); } if (back_rb) { diff --git a/src/mesa/drivers/dri/i965/intel_context.h b/src/mesa/drivers/dri/i965/intel_context.h index f4e7bf4ac35..188ac895a5f 100644 --- a/src/mesa/drivers/dri/i965/intel_context.h +++ b/src/mesa/drivers/dri/i965/intel_context.h @@ -54,7 +54,6 @@ extern "C" { #include "tnl/t_vertex.h" struct intel_region; -struct intel_context; #define INTEL_WRITE_PART 0x1 #define INTEL_WRITE_FULL 0x2 @@ -107,14 +106,6 @@ struct intel_batchbuffer { }; /** - * intel_context is derived from Mesa's context class: struct gl_context. - */ -struct intel_context -{ - struct gl_context ctx; /**< base class, must be first field */ -}; - -/** * Align a value down to an alignment value * * If \c value is not already aligned to the requested alignment value, it @@ -221,7 +212,7 @@ extern int INTEL_DEBUG; if (unlikely(INTEL_DEBUG & DEBUG_PERF)) \ dbg_printf(__VA_ARGS__); \ if (brw->perf_debug) \ - _mesa_gl_debug(&brw->intel.ctx, &msg_id, \ + _mesa_gl_debug(&brw->ctx, &msg_id, \ MESA_DEBUG_TYPE_PERFORMANCE, \ MESA_DEBUG_SEVERITY_MEDIUM, \ __VA_ARGS__); \ @@ -289,16 +280,6 @@ intelInitExtensions(struct gl_context *ctx); extern void intelInitClearFuncs(struct dd_function_table *functions); -/*====================================================================== - * Inline conversion functions. - * These are better-typed than the macros used previously: - */ -static INLINE struct intel_context * -intel_context(struct gl_context * ctx) -{ - return (struct intel_context *) ctx; -} - static INLINE bool is_power_of_two(uint32_t value) { diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index 0a89492fc69..e746cb434e3 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -384,7 +384,6 @@ intel_create_private_renderbuffer(gl_format format, unsigned num_samples) static struct gl_renderbuffer * intel_new_renderbuffer(struct gl_context * ctx, GLuint name) { - /*struct intel_context *intel = intel_context(ctx); */ struct intel_renderbuffer *irb; struct gl_renderbuffer *rb; @@ -877,7 +876,7 @@ intel_renderbuffer_move_to_temp(struct brw_context *brw, void intel_fbo_init(struct brw_context *brw) { - struct dd_function_table *dd = &brw->intel.ctx.Driver; + struct dd_function_table *dd = &brw->ctx.Driver; dd->NewFramebuffer = intel_new_framebuffer; dd->NewRenderbuffer = intel_new_renderbuffer; dd->MapRenderbuffer = intel_map_renderbuffer; diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h index b3f333701f6..2a8a462b18e 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.h +++ b/src/mesa/drivers/dri/i965/intel_fbo.h @@ -40,7 +40,6 @@ extern "C" { #endif -struct intel_context; struct intel_mipmap_tree; struct intel_texture_image; diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 058048b24ed..36a080f8f74 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -659,7 +659,6 @@ intel_miptree_create_for_dri2_buffer(struct brw_context *brw, uint32_t num_samples, struct intel_region *region) { - struct intel_context *intel = &brw->intel; struct intel_mipmap_tree *singlesample_mt = NULL; struct intel_mipmap_tree *multisample_mt = NULL; @@ -1620,8 +1619,7 @@ intel_miptree_upsample(struct brw_context *brw, void * intel_miptree_map_raw(struct brw_context *brw, struct intel_mipmap_tree *mt) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; /* CPU accesses to color buffers don't understand fast color clears, so * resolve any pending fast color clears before we map. */ @@ -1754,8 +1752,7 @@ intel_miptree_unmap_blit(struct brw_context *brw, unsigned int level, unsigned int slice) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; intel_miptree_unmap_raw(brw, map->mt); @@ -2191,7 +2188,7 @@ intel_miptree_map_multisample(struct brw_context *brw, void **out_ptr, int *out_stride) { - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct intel_miptree_map *map; assert(mt->num_samples > 1); diff --git a/src/mesa/drivers/dri/i965/intel_pixel_copy.c b/src/mesa/drivers/dri/i965/intel_pixel_copy.c index 632b9b04512..c935c4c3e20 100644 --- a/src/mesa/drivers/dri/i965/intel_pixel_copy.c +++ b/src/mesa/drivers/dri/i965/intel_pixel_copy.c @@ -53,7 +53,6 @@ do_blit_copypixels(struct gl_context * ctx, GLint dstx, GLint dsty, GLenum type) { struct brw_context *brw = brw_context(ctx); - struct intel_context *intel = intel_context(ctx); struct gl_framebuffer *fb = ctx->DrawBuffer; struct gl_framebuffer *read_fb = ctx->ReadBuffer; GLint orig_dstx; @@ -145,7 +144,7 @@ do_blit_copypixels(struct gl_context * ctx, intel_prepare_render(brw); - intel_flush(&intel->ctx); + intel_flush(&brw->ctx); /* Clip to destination buffer. */ orig_dstx = dstx; diff --git a/src/mesa/drivers/dri/i965/intel_regions.h b/src/mesa/drivers/dri/i965/intel_regions.h index 62a1c9c54ba..428f4dce1dc 100644 --- a/src/mesa/drivers/dri/i965/intel_regions.h +++ b/src/mesa/drivers/dri/i965/intel_regions.h @@ -46,7 +46,6 @@ extern "C" { #endif struct brw_context; -struct intel_context; struct intel_screen; struct intel_buffer_object; diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index a9a5c121b5b..f913c429db5 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -156,9 +156,8 @@ static void intelDRI2Flush(__DRIdrawable *drawable) { GET_CURRENT_CONTEXT(ctx); - struct intel_context *intel = intel_context(ctx); struct brw_context *brw = brw_context(ctx); - if (intel == NULL) + if (brw == NULL) return; intel_resolve_for_dri2_flush(brw, drawable); @@ -378,7 +377,7 @@ intel_create_image_from_renderbuffer(__DRIcontext *context, { __DRIimage *image; struct brw_context *brw = context->driverPrivate; - struct gl_context *ctx = &brw->intel.ctx; + struct gl_context *ctx = &brw->ctx; struct gl_renderbuffer *rb; struct intel_renderbuffer *irb; @@ -416,12 +415,11 @@ intel_create_image_from_texture(__DRIcontext *context, int target, { __DRIimage *image; struct brw_context *brw = context->driverPrivate; - struct intel_context *intel = &brw->intel; struct gl_texture_object *obj; struct intel_texture_object *iobj; GLuint face = 0; - obj = _mesa_lookup_texture(&intel->ctx, texture); + obj = _mesa_lookup_texture(&brw->ctx, texture); if (!obj || obj->Target != target) { *error = __DRI_IMAGE_ERROR_BAD_PARAMETER; return NULL; @@ -430,7 +428,7 @@ intel_create_image_from_texture(__DRIcontext *context, int target, if (target == GL_TEXTURE_CUBE_MAP) face = zoffset; - _mesa_test_texobj_completeness(&intel->ctx, obj); + _mesa_test_texobj_completeness(&brw->ctx, obj); iobj = intel_texture_object(obj); if (!obj->_BaseComplete || (level > 0 && !obj->_MipmapComplete)) { *error = __DRI_IMAGE_ERROR_BAD_PARAMETER; diff --git a/src/mesa/drivers/dri/i965/intel_screen.h b/src/mesa/drivers/dri/i965/intel_screen.h index 3b99b8234bc..9af42201e63 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.h +++ b/src/mesa/drivers/dri/i965/intel_screen.h @@ -51,7 +51,7 @@ struct intel_screen /* * The hardware hiz and separate stencil fields are needed in intel_screen, - * rather than solely in intel_context, because glXCreatePbuffer and + * rather than solely in brw_context, because glXCreatePbuffer and * glXCreatePixmap are not passed a GLXContext. */ bool hw_has_separate_stencil; diff --git a/src/mesa/drivers/dri/i965/intel_tex_image.c b/src/mesa/drivers/dri/i965/intel_tex_image.c index 284fe800ee0..9c5d234b12c 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_image.c +++ b/src/mesa/drivers/dri/i965/intel_tex_image.c @@ -239,14 +239,13 @@ intel_set_texture_image_region(struct gl_context *ctx, GLuint tile_x, GLuint tile_y) { - struct intel_context *intel = intel_context(ctx); struct brw_context *brw = brw_context(ctx); struct intel_texture_image *intel_image = intel_texture_image(image); struct gl_texture_object *texobj = image->TexObject; struct intel_texture_object *intel_texobj = intel_texture_object(texobj); uint32_t draw_x, draw_y; - _mesa_init_teximage_fields(&intel->ctx, image, + _mesa_init_teximage_fields(&brw->ctx, image, width, height, 1, 0, internalFormat, format); @@ -294,8 +293,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, { struct gl_framebuffer *fb = dPriv->driverPrivate; struct brw_context *brw = pDRICtx->driverPrivate; - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct intel_texture_object *intelObj; struct intel_renderbuffer *rb; struct gl_texture_object *texObj; @@ -333,7 +331,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, texFormat = MESA_FORMAT_RGB565; } - _mesa_lock_texture(&intel->ctx, texObj); + _mesa_lock_texture(&brw->ctx, texObj); texImage = _mesa_get_tex_image(ctx, texObj, target, level); intel_miptree_make_shareable(brw, rb->mt); intel_set_texture_image_region(ctx, texImage, rb->mt->region, target, @@ -341,7 +339,7 @@ intelSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, rb->mt->region->width, rb->mt->region->height, 0, 0); - _mesa_unlock_texture(&intel->ctx, texObj); + _mesa_unlock_texture(&brw->ctx, texObj); } void diff --git a/src/mesa/drivers/dri/i965/intel_tex_validate.c b/src/mesa/drivers/dri/i965/intel_tex_validate.c index 77b65710896..c34c144604b 100644 --- a/src/mesa/drivers/dri/i965/intel_tex_validate.c +++ b/src/mesa/drivers/dri/i965/intel_tex_validate.c @@ -40,8 +40,7 @@ intel_update_max_level(struct intel_texture_object *intelObj, GLuint intel_finalize_mipmap_tree(struct brw_context *brw, GLuint unit) { - struct intel_context *intel = &brw->intel; - struct gl_context *ctx = &intel->ctx; + struct gl_context *ctx = &brw->ctx; struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; struct intel_texture_object *intelObj = intel_texture_object(tObj); struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit); diff --git a/src/mesa/drivers/dri/i965/test_eu_compact.c b/src/mesa/drivers/dri/i965/test_eu_compact.c index e6e4ef818f1..cc0c6e46812 100644 --- a/src/mesa/drivers/dri/i965/test_eu_compact.c +++ b/src/mesa/drivers/dri/i965/test_eu_compact.c @@ -32,7 +32,6 @@ static bool test_compact_instruction(struct brw_compile *p, struct brw_instruction src) { struct brw_context *brw = p->brw; - struct intel_context *intel = &brw->intel; struct brw_compact_instruction dst; memset(&dst, 0xd0, sizeof(dst)); @@ -296,7 +295,6 @@ int main(int argc, char **argv) { struct brw_context *brw = calloc(1, sizeof(*brw)); - struct intel_context *intel = &brw->intel; brw->gen = 6; bool fail = false; diff --git a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp index 2603e72570f..6e8391b63cb 100644 --- a/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp +++ b/src/mesa/drivers/dri/i965/test_vec4_register_coalesce.cpp @@ -35,7 +35,6 @@ class register_coalesce_test : public ::testing::Test { public: struct brw_context *brw; - struct intel_context *intel; struct gl_context *ctx; struct gl_shader_program *shader_prog; struct brw_vertex_program *vp; @@ -96,8 +95,7 @@ protected: void register_coalesce_test::SetUp() { brw = (struct brw_context *)calloc(1, sizeof(*brw)); - intel = &brw->intel; - ctx = &intel->ctx; + ctx = &brw->ctx; vp = ralloc(NULL, struct brw_vertex_program); |