diff options
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_context.h | 11 | ||||
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_emit.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/vc4/vc4_state.c | 12 |
3 files changed, 28 insertions, 1 deletions
diff --git a/src/gallium/drivers/vc4/vc4_context.h b/src/gallium/drivers/vc4/vc4_context.h index 7839a5a8868..94306a7e86c 100644 --- a/src/gallium/drivers/vc4/vc4_context.h +++ b/src/gallium/drivers/vc4/vc4_context.h @@ -205,6 +205,17 @@ struct vc4_rasterizer_state { uint8_t config_bits[3]; float point_size; + + /** + * Half-float (1/8/7 bits) value of polygon offset units for + * VC4_PACKET_DEPTH_OFFSET + */ + uint16_t offset_units; + /** + * Half-float (1/8/7 bits) value of polygon offset scale for + * VC4_PACKET_DEPTH_OFFSET + */ + uint16_t offset_factor; }; struct vc4_depth_stencil_alpha_state { diff --git a/src/gallium/drivers/vc4/vc4_emit.c b/src/gallium/drivers/vc4/vc4_emit.c index 2a25ca08b9d..49f0010e20c 100644 --- a/src/gallium/drivers/vc4/vc4_emit.c +++ b/src/gallium/drivers/vc4/vc4_emit.c @@ -49,6 +49,12 @@ vc4_emit_state(struct pipe_context *pctx) vc4->zsa->config_bits[2]); } + if (vc4->dirty & VC4_DIRTY_RASTERIZER) { + cl_u8(&vc4->bcl, VC4_PACKET_DEPTH_OFFSET); + cl_u16(&vc4->bcl, vc4->rasterizer->offset_factor); + cl_u16(&vc4->bcl, vc4->rasterizer->offset_units); + } + if (vc4->dirty & VC4_DIRTY_VIEWPORT) { cl_u8(&vc4->bcl, VC4_PACKET_CLIPPER_XY_SCALING); cl_f(&vc4->bcl, vc4->viewport.scale[0] * 16.0f); diff --git a/src/gallium/drivers/vc4/vc4_state.c b/src/gallium/drivers/vc4/vc4_state.c index 2e14573deb0..81dac21f548 100644 --- a/src/gallium/drivers/vc4/vc4_state.c +++ b/src/gallium/drivers/vc4/vc4_state.c @@ -79,6 +79,12 @@ vc4_set_sample_mask(struct pipe_context *pctx, unsigned sample_mask) vc4->dirty |= VC4_DIRTY_SAMPLE_MASK; } +static uint16_t +float_to_187_half(float f) +{ + return fui(f) >> 16; +} + static void * vc4_create_rasterizer_state(struct pipe_context *pctx, const struct pipe_rasterizer_state *cso) @@ -102,9 +108,13 @@ vc4_create_rasterizer_state(struct pipe_context *pctx, if (cso->front_ccw) so->config_bits[0] |= VC4_CONFIG_BITS_CW_PRIMITIVES; - if (cso->offset_tri) + if (cso->offset_tri) { so->config_bits[0] |= VC4_CONFIG_BITS_ENABLE_DEPTH_OFFSET; + so->offset_units = float_to_187_half(cso->offset_units); + so->offset_factor = float_to_187_half(cso->offset_scale); + } + return so; } |