diff options
| -rw-r--r-- | src/panfrost/midgard/compiler.h | 9 | ||||
| -rw-r--r-- | src/panfrost/midgard/midgard_compile.c | 20 |
2 files changed, 7 insertions, 22 deletions
diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h index 18ff2572b48..936d2232bae 100644 --- a/src/panfrost/midgard/compiler.h +++ b/src/panfrost/midgard/compiler.h @@ -663,15 +663,6 @@ bool mir_is_live_after(compiler_context *ctx, midgard_block *block, midgard_inst void mir_create_pipeline_registers(compiler_context *ctx); void midgard_promote_uniforms(compiler_context *ctx); -midgard_instruction * -emit_ubo_read( - compiler_context *ctx, - nir_instr *instr, - unsigned dest, - unsigned offset, - nir_src *indirect_offset, - unsigned index); - void emit_sysval_read(compiler_context *ctx, nir_instr *instr, signed dest_override, unsigned nr_components); diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index efd9f483de5..2dd58b714f8 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -1121,13 +1121,14 @@ mir_set_intr_mask(nir_instr *instr, midgard_instruction *ins, bool is_read) /* Uniforms and UBOs use a shared code path, as uniforms are just (slightly * optimized) versions of UBO #0 */ -midgard_instruction * +static midgard_instruction * emit_ubo_read( compiler_context *ctx, nir_instr *instr, unsigned dest, unsigned offset, nir_src *indirect_offset, + unsigned indirect_shift, unsigned index) { /* TODO: half-floats */ @@ -1140,7 +1141,7 @@ emit_ubo_read( if (indirect_offset) { ins.src[2] = nir_src_index(ctx, indirect_offset); - ins.load_store.arg_2 = 0x80; + ins.load_store.arg_2 = (indirect_shift << 5); } else { ins.load_store.arg_2 = 0x1E; } @@ -1313,7 +1314,7 @@ emit_sysval_read(compiler_context *ctx, nir_instr *instr, signed dest_override, /* Emit the read itself -- this is never indirect */ midgard_instruction *ins = - emit_ubo_read(ctx, instr, dest, uniform * 16, NULL, 0); + emit_ubo_read(ctx, instr, dest, uniform * 16, NULL, 0, 0); ins->mask = mask_of(nr_components); } @@ -1450,22 +1451,15 @@ emit_intrinsic(compiler_context *ctx, nir_intrinsic_instr *instr) reg = nir_dest_index(ctx, &instr->dest); if (is_uniform && !ctx->is_blend) { - emit_ubo_read(ctx, &instr->instr, reg, (ctx->sysval_count + offset) * 16, indirect_offset, 0); + emit_ubo_read(ctx, &instr->instr, reg, (ctx->sysval_count + offset) * 16, indirect_offset, 4, 0); } else if (is_ubo) { nir_src index = instr->src[0]; - /* We don't yet support indirect UBOs. For indirect - * block numbers (if that's possible), we don't know - * enough about the hardware yet. For indirect sources, - * we know what we need but we need to add some NIR - * support for lowering correctly with respect to - * 128-bit reads */ - + /* TODO: Is indirect block number possible? */ assert(nir_src_is_const(index)); - assert(nir_src_is_const(*src_offset)); uint32_t uindex = nir_src_as_uint(index) + 1; - emit_ubo_read(ctx, &instr->instr, reg, offset, NULL, uindex); + emit_ubo_read(ctx, &instr->instr, reg, offset, indirect_offset, 0, uindex); } else if (is_ssbo) { nir_src index = instr->src[0]; assert(nir_src_is_const(index)); |