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-rw-r--r--src/mesa/drivers/dri/i965/brw_tcs.c6
-rw-r--r--src/mesa/drivers/dri/i965/brw_tes.c10
2 files changed, 8 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_tcs.c b/src/mesa/drivers/dri/i965/brw_tcs.c
index 8a78a40f690..345aa7f1a4c 100644
--- a/src/mesa/drivers/dri/i965/brw_tcs.c
+++ b/src/mesa/drivers/dri/i965/brw_tcs.c
@@ -341,10 +341,10 @@ brw_tcs_populate_key(struct brw_context *brw,
/* We need to specialize our code generation for tessellation levels
* based on the domain the DS is expecting to tessellate.
*/
- key->tes_primitive_mode = tep->program.PrimitiveMode;
+ key->tes_primitive_mode = tep->program.Base.info.tes.primitive_mode;
key->quads_workaround = brw->gen < 9 &&
- tep->program.PrimitiveMode == GL_QUADS &&
- tep->program.Spacing == GL_EQUAL;
+ tep->program.Base.info.tes.primitive_mode == GL_QUADS &&
+ tep->program.Base.info.tes.spacing == GL_EQUAL;
if (tcp) {
key->program_string_id = tcp->id;
diff --git a/src/mesa/drivers/dri/i965/brw_tes.c b/src/mesa/drivers/dri/i965/brw_tes.c
index fe03816b548..fed19751b5c 100644
--- a/src/mesa/drivers/dri/i965/brw_tes.c
+++ b/src/mesa/drivers/dri/i965/brw_tes.c
@@ -96,7 +96,7 @@ brw_codegen_tes_prog(struct brw_context *brw,
shader_prog, &tep->program.Base,
&prog_data.base.base, 0);
- switch (tep->program.Spacing) {
+ switch (tep->program.Base.info.tes.spacing) {
case GL_EQUAL:
prog_data.partitioning = BRW_TESS_PARTITIONING_INTEGER;
break;
@@ -110,7 +110,7 @@ brw_codegen_tes_prog(struct brw_context *brw,
unreachable("invalid domain shader spacing");
}
- switch (tep->program.PrimitiveMode) {
+ switch (tep->program.Base.info.tes.primitive_mode) {
case GL_QUADS:
prog_data.domain = BRW_TESS_DOMAIN_QUAD;
break;
@@ -124,13 +124,13 @@ brw_codegen_tes_prog(struct brw_context *brw,
unreachable("invalid domain shader primitive mode");
}
- if (tep->program.PointMode) {
+ if (tep->program.Base.info.tes.point_mode) {
prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_POINT;
- } else if (tep->program.PrimitiveMode == GL_ISOLINES) {
+ } else if (tep->program.Base.info.tes.primitive_mode == GL_ISOLINES) {
prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_LINE;
} else {
/* Hardware winding order is backwards from OpenGL */
- switch (tep->program.VertexOrder) {
+ switch (tep->program.Base.info.tes.vertex_order) {
case GL_CCW:
prog_data.output_topology = BRW_TESS_OUTPUT_TOPOLOGY_TRI_CW;
break;