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-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_draw.c17
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_gmem.c15
2 files changed, 9 insertions, 23 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
index 245c8b715b0..9db8a80a251 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_draw.c
@@ -41,7 +41,7 @@
#include "fd6_zsa.h"
static void
-draw_emit_indirect(struct fd_batch *batch, struct fd_ringbuffer *ring,
+draw_emit_indirect(struct fd_ringbuffer *ring,
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
@@ -53,20 +53,20 @@ draw_emit_indirect(struct fd_batch *batch, struct fd_ringbuffer *ring,
unsigned max_indicies = (idx->width0 - index_offset) / info->index_size;
OUT_PKT7(ring, CP_DRAW_INDX_INDIRECT, 6);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
+ OUT_RING(ring, draw0);
OUT_RELOC(ring, fd_resource(idx)->bo,
index_offset, 0, 0);
OUT_RING(ring, A5XX_CP_DRAW_INDX_INDIRECT_3_MAX_INDICES(max_indicies));
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
} else {
OUT_PKT7(ring, CP_DRAW_INDIRECT, 3);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
+ OUT_RING(ring, draw0);
OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
}
}
static void
-draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
+draw_emit(struct fd_ringbuffer *ring,
uint32_t draw0,
const struct pipe_draw_info *info,
unsigned index_offset)
@@ -79,7 +79,7 @@ draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
uint32_t idx_offset = index_offset + info->start * info->index_size;
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 7);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
+ OUT_RING(ring, draw0);
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
OUT_RING(ring, 0x0); /* XXX */
@@ -87,7 +87,7 @@ draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
OUT_RING (ring, idx_size);
} else {
OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, 3);
- OUT_RINGP(ring, draw0, &batch->draw_patches);
+ OUT_RING(ring, draw0);
OUT_RING(ring, info->instance_count); /* NumInstances */
OUT_RING(ring, info->count); /* NumIndices */
}
@@ -208,6 +208,7 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
*/
uint32_t draw0 =
CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(primtype) |
+ CP_DRAW_INDX_OFFSET_0_VIS_CULL(USE_VISIBILITY) |
0x2000;
if (info->index_size) {
@@ -220,9 +221,9 @@ fd6_draw_vbo(struct fd_context *ctx, const struct pipe_draw_info *info,
}
if (info->indirect) {
- draw_emit_indirect(ctx->batch, ring, draw0, info, index_offset);
+ draw_emit_indirect(ring, draw0, info, index_offset);
} else {
- draw_emit(ctx->batch, ring, draw0, info, index_offset);
+ draw_emit(ring, draw0, info, index_offset);
}
emit_marker6(ring, 7);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
index f93dd570982..a7bbe58bdd1 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c
@@ -284,17 +284,6 @@ patch_fb_read(struct fd_batch *batch)
}
static void
-patch_draws(struct fd_batch *batch, enum pc_di_vis_cull_mode vismode)
-{
- unsigned i;
- for (i = 0; i < fd_patch_num_elements(&batch->draw_patches); i++) {
- struct fd_cs_patch *patch = fd_patch_element(&batch->draw_patches, i);
- *patch->cs = patch->val | DRAW4(0, 0, 0, vismode);
- }
- util_dynarray_clear(&batch->draw_patches);
-}
-
-static void
update_render_cntl(struct fd_batch *batch, struct pipe_framebuffer_state *pfb, bool binning)
{
struct fd_ringbuffer *ring = batch->gmem;
@@ -552,7 +541,6 @@ fd6_emit_tile_init(struct fd_batch *batch)
A6XX_RB_BIN_CONTROL_BINNING_PASS | 0x6000000);
update_render_cntl(batch, pfb, true);
emit_binning_pass(batch);
- patch_draws(batch, USE_VISIBILITY);
set_bin_size(ring, gmem->bin_w, gmem->bin_h,
A6XX_RB_BIN_CONTROL_USE_VIZ | 0x6000000);
@@ -570,7 +558,6 @@ fd6_emit_tile_init(struct fd_batch *batch)
OUT_RING(ring, 0x1);
} else {
set_bin_size(ring, gmem->bin_w, gmem->bin_h, 0x6000000);
- patch_draws(batch, IGNORE_VISIBILITY);
}
update_render_cntl(batch, pfb, false);
@@ -1184,8 +1171,6 @@ fd6_emit_sysmem_prep(struct fd_batch *batch)
OUT_PKT7(ring, CP_SET_VISIBILITY_OVERRIDE, 1);
OUT_RING(ring, 0x1);
- patch_draws(batch, IGNORE_VISIBILITY);
-
emit_zs(ring, pfb->zsbuf, NULL);
emit_mrt(ring, pfb, NULL);
emit_msaa(ring, pfb->samples);