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-rw-r--r--src/gallium/auxiliary/tgsi/tgsi_info.c60
1 files changed, 35 insertions, 25 deletions
diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c b/src/gallium/auxiliary/tgsi/tgsi_info.c
index f3d15c9a2a1..4916da9096c 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_info.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
@@ -264,28 +264,26 @@ tgsi_get_processor_name( uint processor )
}
}
-/*
- * infer the source type of a TGSI opcode.
- * MOV is special so return VOID
+/**
+ * Infer the type (of the dst) of the opcode.
+ *
+ * MOV and UCMP is special so return VOID
*/
-enum tgsi_opcode_type
-tgsi_opcode_infer_src_type( uint opcode )
+static INLINE enum tgsi_opcode_type
+tgsi_opcode_infer_type( uint opcode )
{
switch (opcode) {
case TGSI_OPCODE_MOV:
+ case TGSI_OPCODE_UCMP:
return TGSI_TYPE_UNTYPED;
- case TGSI_OPCODE_UIF:
case TGSI_OPCODE_SHL:
case TGSI_OPCODE_AND:
case TGSI_OPCODE_OR:
case TGSI_OPCODE_XOR:
- /* XXX some src args may be signed for SAD ? */
case TGSI_OPCODE_SAD:
- case TGSI_OPCODE_TXF:
case TGSI_OPCODE_TXQ:
- case TGSI_OPCODE_BREAKC:
- case TGSI_OPCODE_U2F:
- case TGSI_OPCODE_UADD:
+ case TGSI_OPCODE_TXQ_LZ:
+ case TGSI_OPCODE_F2U:
case TGSI_OPCODE_UDIV:
case TGSI_OPCODE_UMAD:
case TGSI_OPCODE_UMAX:
@@ -297,14 +295,12 @@ tgsi_opcode_infer_src_type( uint opcode )
case TGSI_OPCODE_USHR:
case TGSI_OPCODE_USLT:
case TGSI_OPCODE_USNE:
- case TGSI_OPCODE_SWITCH:
- case TGSI_OPCODE_CASE:
- case TGSI_OPCODE_SAMPLE_I:
- case TGSI_OPCODE_SAMPLE_I_MS:
case TGSI_OPCODE_SVIEWINFO:
return TGSI_TYPE_UNSIGNED;
- case TGSI_OPCODE_I2F:
+ case TGSI_OPCODE_ARL:
+ case TGSI_OPCODE_ARR:
case TGSI_OPCODE_MOD:
+ case TGSI_OPCODE_F2I:
case TGSI_OPCODE_IDIV:
case TGSI_OPCODE_IMAX:
case TGSI_OPCODE_IMIN:
@@ -312,6 +308,7 @@ tgsi_opcode_infer_src_type( uint opcode )
case TGSI_OPCODE_ISGE:
case TGSI_OPCODE_ISHR:
case TGSI_OPCODE_ISLT:
+ case TGSI_OPCODE_UADD:
case TGSI_OPCODE_UARL:
case TGSI_OPCODE_IABS:
case TGSI_OPCODE_ISSG:
@@ -322,24 +319,27 @@ tgsi_opcode_infer_src_type( uint opcode )
}
/*
- * infer the destination type of a TGSI opcode.
+ * infer the source type of a TGSI opcode.
* MOV is special so return VOID
*/
enum tgsi_opcode_type
-tgsi_opcode_infer_dst_type( uint opcode )
+tgsi_opcode_infer_src_type( uint opcode )
{
switch (opcode) {
case TGSI_OPCODE_MOV:
- case TGSI_OPCODE_UCMP:
return TGSI_TYPE_UNTYPED;
+ case TGSI_OPCODE_UIF:
case TGSI_OPCODE_SHL:
case TGSI_OPCODE_AND:
case TGSI_OPCODE_OR:
case TGSI_OPCODE_XOR:
+ /* XXX some src args may be signed for SAD ? */
case TGSI_OPCODE_SAD:
+ case TGSI_OPCODE_TXF:
case TGSI_OPCODE_TXQ:
- case TGSI_OPCODE_TXQ_LZ:
- case TGSI_OPCODE_F2U:
+ case TGSI_OPCODE_BREAKC:
+ case TGSI_OPCODE_U2F:
+ case TGSI_OPCODE_UADD:
case TGSI_OPCODE_UDIV:
case TGSI_OPCODE_UMAD:
case TGSI_OPCODE_UMAX:
@@ -351,12 +351,14 @@ tgsi_opcode_infer_dst_type( uint opcode )
case TGSI_OPCODE_USHR:
case TGSI_OPCODE_USLT:
case TGSI_OPCODE_USNE:
+ case TGSI_OPCODE_SWITCH:
+ case TGSI_OPCODE_CASE:
+ case TGSI_OPCODE_SAMPLE_I:
+ case TGSI_OPCODE_SAMPLE_I_MS:
case TGSI_OPCODE_SVIEWINFO:
return TGSI_TYPE_UNSIGNED;
- case TGSI_OPCODE_ARL:
- case TGSI_OPCODE_ARR:
+ case TGSI_OPCODE_I2F:
case TGSI_OPCODE_MOD:
- case TGSI_OPCODE_F2I:
case TGSI_OPCODE_IDIV:
case TGSI_OPCODE_IMAX:
case TGSI_OPCODE_IMIN:
@@ -364,7 +366,6 @@ tgsi_opcode_infer_dst_type( uint opcode )
case TGSI_OPCODE_ISGE:
case TGSI_OPCODE_ISHR:
case TGSI_OPCODE_ISLT:
- case TGSI_OPCODE_UADD:
case TGSI_OPCODE_UARL:
case TGSI_OPCODE_IABS:
case TGSI_OPCODE_ISSG:
@@ -373,3 +374,12 @@ tgsi_opcode_infer_dst_type( uint opcode )
return TGSI_TYPE_FLOAT;
}
}
+
+/*
+ * infer the destination type of a TGSI opcode.
+ */
+enum tgsi_opcode_type
+tgsi_opcode_infer_dst_type( uint opcode )
+{
+ return tgsi_opcode_infer_type(opcode);
+}