diff options
author | Matt Atwood <[email protected]> | 2014-05-02 09:44:45 -0700 |
---|---|---|
committer | Matt Turner <[email protected]> | 2014-05-22 10:17:16 -0700 |
commit | f935dfc022f2481b3ed6ecfccafef37ce71776f0 (patch) | |
tree | 03a7b917d70cfaad2cb4c5b31c97c3c349e32451 /src | |
parent | a2fb71e23bced3f3585e91726590efe6034a10ed (diff) |
i965: Use SSE4.1 runtime detection for intel_miptree_map.
Previous it was a compile-time decision.
Reviewed-by: Matt Turner <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 11 |
1 files changed, 3 insertions, 8 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 7e626dbbfde..b7d86a30ed4 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -46,6 +46,7 @@ #include "main/texcompress_etc.h" #include "main/teximage.h" #include "main/streaming-load-memcpy.h" +#include "x86/common_x86_asm.h" #define FILE_DEBUG_FLAG DEBUG_MIPTREE @@ -1830,7 +1831,6 @@ intel_miptree_unmap_blit(struct brw_context *brw, intel_miptree_release(&map->mt); } -#ifdef __SSE4_1__ /** * "Map" a buffer by copying it to an untiled temporary using MOVNTDQA. */ @@ -1901,7 +1901,6 @@ intel_miptree_unmap_movntdqa(struct brw_context *brw, map->buffer = NULL; map->ptr = NULL; } -#endif static void intel_miptree_map_s8(struct brw_context *brw, @@ -2282,10 +2281,8 @@ intel_miptree_map(struct brw_context *brw, mt->bo->size >= brw->max_gtt_map_object_size) { assert(can_blit_slice(mt, level, slice)); intel_miptree_map_blit(brw, mt, map, level, slice); -#ifdef __SSE4_1__ - } else if (!(mode & GL_MAP_WRITE_BIT) && !mt->compressed) { + } else if (!(mode & GL_MAP_WRITE_BIT) && !mt->compressed && cpu_has_sse4_1) { intel_miptree_map_movntdqa(brw, mt, map, level, slice); -#endif } else { intel_miptree_map_gtt(brw, mt, map, level, slice); } @@ -2322,10 +2319,8 @@ intel_miptree_unmap(struct brw_context *brw, intel_miptree_unmap_depthstencil(brw, mt, map, level, slice); } else if (map->mt) { intel_miptree_unmap_blit(brw, mt, map, level, slice); -#ifdef __SSE4_1__ - } else if (map->buffer) { + } else if (map->buffer && cpu_has_sse4_1) { intel_miptree_unmap_movntdqa(brw, mt, map, level, slice); -#endif } else { intel_miptree_unmap_gtt(brw, mt, map, level, slice); } |