diff options
author | Alyssa Rosenzweig <[email protected]> | 2019-07-01 20:02:57 -0700 |
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committer | Alyssa Rosenzweig <[email protected]> | 2019-07-10 06:12:05 -0700 |
commit | e92caad74476b915bb73baedbddce8af89bd62b0 (patch) | |
tree | 08c2435a94c76185793cfe66b5340b2b8da79ea7 /src | |
parent | 3dbedb26f571497a6bfcd58f7e48a32ec4bd58f8 (diff) |
panfrost/midgard: Handle fp16 in embedded_to_inline_constants
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/panfrost/midgard/midgard_compile.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c index de40eeafdd5..b7498d43501 100644 --- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c +++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c @@ -1880,6 +1880,13 @@ embedded_to_inline_constant(compiler_context *ctx) /* Blend constants must not be inlined by definition */ if (ins->has_blend_constant) continue; + /* We can inline 32-bit (sometimes) or 16-bit (usually) */ + bool is_16 = ins->alu.reg_mode == midgard_reg_mode_16; + bool is_32 = ins->alu.reg_mode == midgard_reg_mode_32; + + if (!(is_16 || is_32)) + continue; + /* src1 cannot be an inline constant due to encoding * restrictions. So, if possible we try to flip the arguments * in that case */ @@ -1930,7 +1937,7 @@ embedded_to_inline_constant(compiler_context *ctx) /* Scale constant appropriately, if we can legally */ uint16_t scaled_constant = 0; - if (midgard_is_integer_op(op)) { + if (midgard_is_integer_op(op) || is_16) { unsigned int *iconstants = (unsigned int *) ins->constants; scaled_constant = (uint16_t) iconstants[component]; |