diff options
author | Marek Vasut <[email protected]> | 2020-03-09 04:14:26 +0100 |
---|---|---|
committer | Marek Vasut <[email protected]> | 2020-04-24 21:22:55 +0200 |
commit | c8ccd63911dcec731d64c72a40ec6a3afe38eaa1 (patch) | |
tree | 1d818b3e928ecb11721a9401d70ff7b53ed3a1ee /src | |
parent | 5c5c2dd48fe0910dc79d3187bed99a52b5ed2848 (diff) |
etnaviv: Fix depth stencil ops on GC880/GC2000
This patch fixes depth stencil ops on MX6S GC880 and MX6Q GC2000.
The following dEQPs now pass:
dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_depth_funcs.*
dEQP-GLES2.functional.fragment_ops.depth_stencil.stencil_ops.*
which is roughly 600 fixed dEQP tests.
The problem is that if the front-facing stencil has a value mask 0x00 and
the back-facing stencil has some non-zero value mask, then the stencil part
of the depth stencil buffer is written with 0x00 unconditionally. The blob
replicates the value mask of the back-facing stencil to the value mask of
the front-facing stencil to achieve correct rendering, replicate the same
behavior here.
Signed-off-by: Marek Vasut <[email protected]>
Reviewed-by: Christian Gmeiner <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4275>
Diffstat (limited to 'src')
-rw-r--r-- | src/gallium/drivers/etnaviv/etnaviv_zsa.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_zsa.c b/src/gallium/drivers/etnaviv/etnaviv_zsa.c index 35d3b4066e7..0684ab77a83 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_zsa.c +++ b/src/gallium/drivers/etnaviv/etnaviv_zsa.c @@ -117,8 +117,8 @@ etna_zsa_state_create(struct pipe_context *pctx, VIVS_PE_ALPHA_OP_ALPHA_REF(etna_cfloat_to_uint8(so->alpha.ref_value)); for (unsigned i = 0; i < 2; i++) { - const struct pipe_stencil_state *stencil_front = so->stencil[1].enabled ? &so->stencil[i] : &so->stencil[0]; - const struct pipe_stencil_state *stencil_back = so->stencil[1].enabled ? &so->stencil[!i] : &so->stencil[0]; + const struct pipe_stencil_state *stencil_front = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[i] : &so->stencil[0]; + const struct pipe_stencil_state *stencil_back = (so->stencil[1].enabled && so->stencil[1].valuemask) ? &so->stencil[!i] : &so->stencil[0]; cs->PE_STENCIL_OP[i] = VIVS_PE_STENCIL_OP_FUNC_FRONT(stencil_front->func) | VIVS_PE_STENCIL_OP_FUNC_BACK(stencil_back->func) | |