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authorBas Nieuwenhuizen <[email protected]>2017-09-16 00:30:18 +0200
committerBas Nieuwenhuizen <[email protected]>2017-09-16 11:55:56 +0200
commit969537d9358bfaff2ddd8e27f4ea4ca3c4063d75 (patch)
treeb81fe571a2ecc76e5770b5a706b7a308a42740b2 /src
parentd398db2acb9bb27ce6833a099f9be1cadcb17c5e (diff)
radv: Add support for more DCC compression with VK_KHR_image_format_list.
Reviewed-by: Dave Airlie <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_device.c4
-rw-r--r--src/amd/vulkan/radv_image.c24
2 files changed, 25 insertions, 3 deletions
diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index c112453e395..e6d595dfbe5 100644
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -170,6 +170,10 @@ static const VkExtensionProperties common_device_extensions[] = {
.extensionName = VK_KHR_VARIABLE_POINTERS_EXTENSION_NAME,
.specVersion = 1,
},
+ {
+ .extensionName = VK_KHR_IMAGE_FORMAT_LIST_EXTENSION_NAME,
+ .specVersion = 1,
+ },
};
static const VkExtensionProperties ext_sema_device_extensions[] = {
{
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c
index 9c04d7ecca5..aeec5ce8822 100644
--- a/src/amd/vulkan/radv_image.c
+++ b/src/amd/vulkan/radv_image.c
@@ -116,14 +116,32 @@ radv_init_surface(struct radv_device *device,
surface->flags |= RADEON_SURF_OPTIMIZE_FOR_SPACE;
+ bool dcc_compatible_formats = !radv_is_colorbuffer_format_supported(pCreateInfo->format, &blendable);
+ if (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) {
+ const struct VkImageFormatListCreateInfoKHR *format_list =
+ (const struct VkImageFormatListCreateInfoKHR *)
+ vk_find_struct_const(pCreateInfo->pNext,
+ IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
+ if (format_list) {
+ /* compatibility is transitive, so we only need to check
+ * one format with everything else. */
+ for (unsigned i = 0; i < format_list->viewFormatCount; ++i) {
+ if (!radv_dcc_formats_compatible(pCreateInfo->format,
+ format_list->pViewFormats[i]))
+ dcc_compatible_formats = false;
+ }
+ } else {
+ dcc_compatible_formats = false;
+ }
+ }
+
if ((pCreateInfo->usage & (VK_IMAGE_USAGE_TRANSFER_SRC_BIT |
VK_IMAGE_USAGE_STORAGE_BIT)) ||
- (pCreateInfo->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) ||
+ !dcc_compatible_formats ||
(pCreateInfo->tiling == VK_IMAGE_TILING_LINEAR) ||
pCreateInfo->mipLevels > 1 || pCreateInfo->arrayLayers > 1 ||
device->physical_device->rad_info.chip_class < VI ||
- create_info->scanout || (device->debug_flags & RADV_DEBUG_NO_DCC) ||
- !radv_is_colorbuffer_format_supported(pCreateInfo->format, &blendable))
+ create_info->scanout || (device->debug_flags & RADV_DEBUG_NO_DCC))
surface->flags |= RADEON_SURF_DISABLE_DCC;
if (create_info->scanout)
surface->flags |= RADEON_SURF_SCANOUT;