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authorThomas Hellstrom <thomas-at-tungstengraphics-dot-com>2008-05-22 16:42:53 +0200
committerJakob Bornecrantz <[email protected]>2008-05-23 11:02:14 +0200
commit45fd9ec462bf338b286d3b757c3e67d54f663dad (patch)
tree27fad764011d1956bd7b2401fc1b27181a338d46 /src
parent9395fb6e8d341d7a3f923b5ec03630ab656c8f2f (diff)
i915: Use the malloc pool for constant buffers since they don't go to the GPU directly.
Diffstat (limited to 'src')
-rw-r--r--src/gallium/winsys/dri/intel/intel_winsys.h2
-rw-r--r--src/gallium/winsys/dri/intel/intel_winsys_pipe.c29
2 files changed, 16 insertions, 15 deletions
diff --git a/src/gallium/winsys/dri/intel/intel_winsys.h b/src/gallium/winsys/dri/intel/intel_winsys.h
index d0a319f9a4f..3d32db10a4a 100644
--- a/src/gallium/winsys/dri/intel/intel_winsys.h
+++ b/src/gallium/winsys/dri/intel/intel_winsys.h
@@ -53,6 +53,7 @@ intel_create_i915simple( struct intel_context *intel,
struct intel_buffer {
struct pipe_buffer base;
+ struct _DriBufferPool *pool;
struct _DriBufferObject *driBO;
};
@@ -69,5 +70,4 @@ dri_bo( struct pipe_buffer *buf )
}
-
#endif
diff --git a/src/gallium/winsys/dri/intel/intel_winsys_pipe.c b/src/gallium/winsys/dri/intel/intel_winsys_pipe.c
index 44baa6d9fa1..7b1c0acfc94 100644
--- a/src/gallium/winsys/dri/intel/intel_winsys_pipe.c
+++ b/src/gallium/winsys/dri/intel/intel_winsys_pipe.c
@@ -50,6 +50,7 @@
struct intel_pipe_winsys {
struct pipe_winsys winsys;
struct _DriBufferPool *regionPool;
+ struct _DriBufferPool *mallocPool;
struct _DriFreeSlabManager *fMan;
};
@@ -110,16 +111,19 @@ intel_buffer_create(struct pipe_winsys *winsys,
struct intel_buffer *buffer = CALLOC_STRUCT( intel_buffer );
struct intel_pipe_winsys *iws = intel_pipe_winsys(winsys);
unsigned flags = 0;
+ struct _DriBufferPool *pool;
buffer->base.refcount = 1;
buffer->base.alignment = alignment;
buffer->base.usage = usage;
buffer->base.size = size;
- if (usage & (PIPE_BUFFER_USAGE_VERTEX /*| IWS_BUFFER_USAGE_LOCAL*/)) {
+ if (usage & (PIPE_BUFFER_USAGE_VERTEX | PIPE_BUFFER_USAGE_CONSTANT)) {
flags |= DRM_BO_FLAG_MEM_LOCAL | DRM_BO_FLAG_CACHED;
+ pool = iws->mallocPool;
} else {
flags |= DRM_BO_FLAG_MEM_VRAM | DRM_BO_FLAG_MEM_TT;
+ pool = iws->regionPool;
}
if (usage & PIPE_BUFFER_USAGE_GPU_READ)
@@ -141,10 +145,11 @@ intel_buffer_create(struct pipe_winsys *winsys,
flags |= DRM_BO_FLAG_CACHED;
#endif
- driGenBuffers( iws->regionPool,
+ buffer->pool = pool;
+ driGenBuffers( buffer->pool,
"pipe buffer", 1, &buffer->driBO, alignment, flags, 0 );
- driBOData( buffer->driBO, size, NULL, iws->regionPool, 0 );
+ driBOData( buffer->driBO, size, NULL, buffer->pool, 0 );
return &buffer->base;
}
@@ -278,8 +283,7 @@ intel_fence_finish( struct pipe_winsys *sws,
struct pipe_fence_handle *fence,
unsigned flag )
{
- /* JB: Lets allways lazy wait */
- return driFenceFinish((struct _DriFenceObject *)fence, flag, 1);
+ return driFenceFinish((struct _DriFenceObject *)fence, flag, 0);
}
struct pipe_winsys *
@@ -310,15 +314,9 @@ intel_create_pipe_winsys( int fd, struct _DriFreeSlabManager *fMan )
iws->winsys.fence_finish = intel_fence_finish;
if (fd)
- iws->regionPool = driSlabPoolInit(fd,
- DRM_BO_FLAG_READ |
- DRM_BO_FLAG_WRITE |
- DRM_BO_FLAG_MEM_TT,
- DRM_BO_FLAG_READ |
- DRM_BO_FLAG_WRITE |
- DRM_BO_FLAG_MEM_TT,
- 64, 6, 16, 4096, 0,
- fMan);
+ iws->regionPool = driDRMPoolInit(fd);
+
+ iws->mallocPool = driMallocPoolInit();
return &iws->winsys;
}
@@ -331,6 +329,9 @@ intel_destroy_pipe_winsys( struct pipe_winsys *winsys )
if (iws->regionPool) {
driPoolTakeDown(iws->regionPool);
}
+ if (iws->mallocPool) {
+ driPoolTakeDown(iws->mallocPool);
+ }
free(iws);
}