diff options
author | Brian Paul <[email protected]> | 2008-11-07 09:33:55 -0700 |
---|---|---|
committer | Brian Paul <[email protected]> | 2008-11-07 09:51:25 -0700 |
commit | 37eef7b474c5d9a7c566f9edf35c797c5a98d065 (patch) | |
tree | 3f7e762b35fb88bbc08f69f83bf55d85caabb911 /src | |
parent | d93072782aa8b7a6bb060c77f3a61adb3b655d58 (diff) |
mesa: added AND/OR/NOT/XOR instructions
Diffstat (limited to 'src')
-rw-r--r-- | src/mesa/shader/prog_execute.c | 214 | ||||
-rw-r--r-- | src/mesa/shader/prog_instruction.c | 4 | ||||
-rw-r--r-- | src/mesa/shader/prog_instruction.h | 4 |
3 files changed, 199 insertions, 23 deletions
diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c index c0173d369e5..b47421d5a11 100644 --- a/src/mesa/shader/prog_execute.c +++ b/src/mesa/shader/prog_execute.c @@ -219,6 +219,37 @@ fetch_vector4(const struct prog_src_register *source, /** + * Fetch a 4-element uint vector from the given source register. + * Apply swizzling but not negation/abs. + */ +static void +fetch_vector4ui(const struct prog_src_register *source, + const struct gl_program_machine *machine, GLuint result[4]) +{ + const GLuint *src = (GLuint *) get_register_pointer(source, machine); + ASSERT(src); + + if (source->Swizzle == SWIZZLE_NOOP) { + /* no swizzling */ + COPY_4V(result, src); + } + else { + ASSERT(GET_SWZ(source->Swizzle, 0) <= 3); + ASSERT(GET_SWZ(source->Swizzle, 1) <= 3); + ASSERT(GET_SWZ(source->Swizzle, 2) <= 3); + ASSERT(GET_SWZ(source->Swizzle, 3) <= 3); + result[0] = src[GET_SWZ(source->Swizzle, 0)]; + result[1] = src[GET_SWZ(source->Swizzle, 1)]; + result[2] = src[GET_SWZ(source->Swizzle, 2)]; + result[3] = src[GET_SWZ(source->Swizzle, 3)]; + } + + /* Note: no NegateBase, Abs, NegateAbs here */ +} + + + +/** * Fetch the derivative with respect to X or Y for the given register. * XXX this currently only works for fragment program input attribs. */ @@ -228,7 +259,8 @@ fetch_vector4_deriv(GLcontext * ctx, const struct gl_program_machine *machine, char xOrY, GLfloat result[4]) { - if (source->File == PROGRAM_INPUT && source->Index < (GLint)machine->NumDeriv) { + if (source->File == PROGRAM_INPUT && + source->Index < (GLint) machine->NumDeriv) { const GLint col = machine->CurElement; const GLfloat w = machine->Attribs[FRAG_ATTRIB_WPOS][col][3]; const GLfloat invQ = 1.0f / w; @@ -493,6 +525,89 @@ store_vector4(const struct prog_instruction *inst, /** + * Store 4 uints into a register. Observe the set-condition-code flags. + */ +static void +store_vector4ui(const struct prog_instruction *inst, + struct gl_program_machine *machine, const GLuint value[4]) +{ + const struct prog_dst_register *dest = &(inst->DstReg); + GLuint *dstReg; + GLuint dummyReg[4]; + GLuint writeMask = dest->WriteMask; + + switch (dest->File) { + case PROGRAM_OUTPUT: + ASSERT(dest->Index < MAX_PROGRAM_OUTPUTS); + dstReg = (GLuint *) machine->Outputs[dest->Index]; + break; + case PROGRAM_TEMPORARY: + ASSERT(dest->Index < MAX_PROGRAM_TEMPS); + dstReg = (GLuint *) machine->Temporaries[dest->Index]; + break; + case PROGRAM_WRITE_ONLY: + dstReg = dummyReg; + return; + default: + _mesa_problem(NULL, "bad register file in store_vector4(fp)"); + return; + } + + if (dest->CondMask != COND_TR) { + /* condition codes may turn off some writes */ + if (writeMask & WRITEMASK_X) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 0)], + dest->CondMask)) + writeMask &= ~WRITEMASK_X; + } + if (writeMask & WRITEMASK_Y) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 1)], + dest->CondMask)) + writeMask &= ~WRITEMASK_Y; + } + if (writeMask & WRITEMASK_Z) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 2)], + dest->CondMask)) + writeMask &= ~WRITEMASK_Z; + } + if (writeMask & WRITEMASK_W) { + if (!test_cc(machine->CondCodes[GET_SWZ(dest->CondSwizzle, 3)], + dest->CondMask)) + writeMask &= ~WRITEMASK_W; + } + } + + if (writeMask & WRITEMASK_X) + dstReg[0] = value[0]; + if (writeMask & WRITEMASK_Y) + dstReg[1] = value[1]; + if (writeMask & WRITEMASK_Z) + dstReg[2] = value[2]; + if (writeMask & WRITEMASK_W) + dstReg[3] = value[3]; + + if (inst->CondUpdate) { + if (writeMask & WRITEMASK_X) + machine->CondCodes[0] = generate_cc(value[0]); + if (writeMask & WRITEMASK_Y) + machine->CondCodes[1] = generate_cc(value[1]); + if (writeMask & WRITEMASK_Z) + machine->CondCodes[2] = generate_cc(value[2]); + if (writeMask & WRITEMASK_W) + machine->CondCodes[3] = generate_cc(value[3]); +#if DEBUG_PROG + printf("CondCodes=(%s,%s,%s,%s) for:\n", + _mesa_condcode_string(machine->CondCodes[0]), + _mesa_condcode_string(machine->CondCodes[1]), + _mesa_condcode_string(machine->CondCodes[2]), + _mesa_condcode_string(machine->CondCodes[3])); +#endif + } +} + + + +/** * Execute the given vertex/fragment program. * * \param ctx rendering context @@ -571,6 +686,18 @@ _mesa_execute_program(GLcontext * ctx, } } break; + case OPCODE_AND: /* bitwise AND */ + { + GLuint a[4], b[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + fetch_vector4ui(&inst->SrcReg[1], machine, b); + result[0] = a[0] & b[0]; + result[1] = a[1] & b[1]; + result[2] = a[2] & b[2]; + result[3] = a[3] & b[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_ARL: { GLfloat t[4]; @@ -1019,6 +1146,17 @@ _mesa_execute_program(GLcontext * ctx, break; case OPCODE_NOP: break; + case OPCODE_NOT: /* bitwise NOT */ + { + GLuint a[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + result[0] = ~a[0]; + result[1] = ~a[1]; + result[2] = ~a[2]; + result[3] = ~a[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_NRM3: /* 3-component normalization */ { GLfloat a[4], result[4]; @@ -1049,39 +1187,53 @@ _mesa_execute_program(GLcontext * ctx, store_vector4(inst, machine, result); } break; + case OPCODE_OR: /* bitwise OR */ + { + GLuint a[4], b[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + fetch_vector4ui(&inst->SrcReg[1], machine, b); + result[0] = a[0] | b[0]; + result[1] = a[1] | b[1]; + result[2] = a[2] | b[2]; + result[3] = a[3] | b[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_PK2H: /* pack two 16-bit floats in one 32-bit float */ { - GLfloat a[4], result[4]; + GLfloat a[4]; + GLuint result[4]; GLhalfNV hx, hy; - GLuint *rawResult = (GLuint *) result; - GLuint twoHalves; fetch_vector4(&inst->SrcReg[0], machine, a); hx = _mesa_float_to_half(a[0]); hy = _mesa_float_to_half(a[1]); - twoHalves = hx | (hy << 16); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = twoHalves; - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = hx | (hy << 16); + store_vector4ui(inst, machine, result); } break; case OPCODE_PK2US: /* pack two GLushorts into one 32-bit float */ { - GLfloat a[4], result[4]; - GLuint usx, usy, *rawResult = (GLuint *) result; + GLfloat a[4]; + GLuint result[4], usx, usy; fetch_vector4(&inst->SrcReg[0], machine, a); a[0] = CLAMP(a[0], 0.0F, 1.0F); a[1] = CLAMP(a[1], 0.0F, 1.0F); usx = IROUND(a[0] * 65535.0F); usy = IROUND(a[1] * 65535.0F); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = usx | (usy << 16); - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = usx | (usy << 16); + store_vector4ui(inst, machine, result); } break; case OPCODE_PK4B: /* pack four GLbytes into one 32-bit float */ { - GLfloat a[4], result[4]; - GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result; + GLfloat a[4]; + GLuint result[4], ubx, uby, ubz, ubw; fetch_vector4(&inst->SrcReg[0], machine, a); a[0] = CLAMP(a[0], -128.0F / 127.0F, 1.0F); a[1] = CLAMP(a[1], -128.0F / 127.0F, 1.0F); @@ -1091,15 +1243,17 @@ _mesa_execute_program(GLcontext * ctx, uby = IROUND(127.0F * a[1] + 128.0F); ubz = IROUND(127.0F * a[2] + 128.0F); ubw = IROUND(127.0F * a[3] + 128.0F); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); + store_vector4ui(inst, machine, result); } break; case OPCODE_PK4UB: /* pack four GLubytes into one 32-bit float */ { - GLfloat a[4], result[4]; - GLuint ubx, uby, ubz, ubw, *rawResult = (GLuint *) result; + GLfloat a[4]; + GLuint result[4], ubx, uby, ubz, ubw; fetch_vector4(&inst->SrcReg[0], machine, a); a[0] = CLAMP(a[0], 0.0F, 1.0F); a[1] = CLAMP(a[1], 0.0F, 1.0F); @@ -1109,9 +1263,11 @@ _mesa_execute_program(GLcontext * ctx, uby = IROUND(255.0F * a[1]); ubz = IROUND(255.0F * a[2]); ubw = IROUND(255.0F * a[3]); - rawResult[0] = rawResult[1] = rawResult[2] = rawResult[3] - = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); - store_vector4(inst, machine, result); + result[0] = + result[1] = + result[2] = + result[3] = ubx | (uby << 8) | (ubz << 16) | (ubw << 24); + store_vector4ui(inst, machine, result); } break; case OPCODE_POW: @@ -1516,6 +1672,18 @@ _mesa_execute_program(GLcontext * ctx, store_vector4(inst, machine, result); } break; + case OPCODE_XOR: /* bitwise XOR */ + { + GLuint a[4], b[4], result[4]; + fetch_vector4ui(&inst->SrcReg[0], machine, a); + fetch_vector4ui(&inst->SrcReg[1], machine, b); + result[0] = a[0] ^ b[0]; + result[1] = a[1] ^ b[1]; + result[2] = a[2] ^ b[2]; + result[3] = a[3] ^ b[3]; + store_vector4ui(inst, machine, result); + } + break; case OPCODE_XPD: /* cross product */ { GLfloat a[4], b[4], result[4]; diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c index d4f3bcb0e53..ac9d9e1bb7f 100644 --- a/src/mesa/shader/prog_instruction.c +++ b/src/mesa/shader/prog_instruction.c @@ -154,6 +154,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_NOP, "NOP", 0, 0 }, { OPCODE_ABS, "ABS", 1, 1 }, { OPCODE_ADD, "ADD", 2, 1 }, + { OPCODE_AND, "AND", 2, 1 }, { OPCODE_ARA, "ARA", 1, 1 }, { OPCODE_ARL, "ARL", 1, 1 }, { OPCODE_ARL_NV, "ARL", 1, 1 }, @@ -193,10 +194,12 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_MIN, "MIN", 2, 1 }, { OPCODE_MOV, "MOV", 1, 1 }, { OPCODE_MUL, "MUL", 2, 1 }, + { OPCODE_NOT, "NOT", 1, 1 }, { OPCODE_NOISE1, "NOISE1", 1, 1 }, { OPCODE_NOISE2, "NOISE2", 1, 1 }, { OPCODE_NOISE3, "NOISE3", 1, 1 }, { OPCODE_NOISE4, "NOISE4", 1, 1 }, + { OPCODE_OR, "OR", 2, 1 }, { OPCODE_NRM3, "NRM3", 1, 1 }, { OPCODE_NRM4, "NRM4", 1, 1 }, { OPCODE_PK2H, "PK2H", 1, 1 }, @@ -237,6 +240,7 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_UP4B, "UP4B", 1, 1 }, { OPCODE_UP4UB, "UP4UB", 1, 1 }, { OPCODE_X2D, "X2D", 3, 1 }, + { OPCODE_XOR, "XOR", 2, 1 }, { OPCODE_XPD, "XPD", 2, 1 } }; diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 3bcd0829a23..2cb2014cd48 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -145,6 +145,7 @@ typedef enum prog_opcode { OPCODE_NOP = 0, /* X */ OPCODE_ABS, /* X X 1.1 X */ OPCODE_ADD, /* X X X X X */ + OPCODE_AND, /* */ OPCODE_ARA, /* 2 */ OPCODE_ARL, /* X X */ OPCODE_ARL_NV, /* 2 */ @@ -188,8 +189,10 @@ typedef enum prog_opcode { OPCODE_NOISE2, /* X */ OPCODE_NOISE3, /* X */ OPCODE_NOISE4, /* X */ + OPCODE_NOT, /* */ OPCODE_NRM3, /* */ OPCODE_NRM4, /* */ + OPCODE_OR, /* */ OPCODE_PK2H, /* X */ OPCODE_PK2US, /* X */ OPCODE_PK4B, /* X */ @@ -228,6 +231,7 @@ typedef enum prog_opcode { OPCODE_UP4B, /* X */ OPCODE_UP4UB, /* X */ OPCODE_X2D, /* X */ + OPCODE_XOR, /* */ OPCODE_XPD, /* X X X */ MAX_OPCODE } gl_inst_opcode; |