diff options
author | Nanley Chery <[email protected]> | 2019-03-27 14:40:58 -0700 |
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committer | Nanley Chery <[email protected]> | 2019-10-28 10:47:05 -0700 |
commit | 22be1447bb46b4dc63fbc2cfc696c01a0f90ab0e (patch) | |
tree | 25ea20b659f8f0941ce9fd272f7c35aa97fa7b57 /src | |
parent | 901bed51227b1d3a186891068f29623b757ff2f2 (diff) |
isl/drm: Map HiZ and CCS tilings to Y
In the function which translates ISL tilings to i915 tilings, map ISL's
HiZ and CCS tilings to Y instead of NONE (linear). The HW docs describe
HiZ and pre-Gen12 CCS surfaces as being Y-tiled in memory.
Reviewed-by: Kenneth Graunke <[email protected]>
Reviewed-by: Jordan Justen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r-- | src/intel/isl/isl_drm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/intel/isl/isl_drm.c b/src/intel/isl/isl_drm.c index e7abe747785..196ecf7f88c 100644 --- a/src/intel/isl/isl_drm.c +++ b/src/intel/isl/isl_drm.c @@ -41,13 +41,13 @@ isl_tiling_to_i915_tiling(enum isl_tiling tiling) return I915_TILING_X; case ISL_TILING_Y0: + case ISL_TILING_HIZ: + case ISL_TILING_CCS: return I915_TILING_Y; case ISL_TILING_W: case ISL_TILING_Yf: case ISL_TILING_Ys: - case ISL_TILING_HIZ: - case ISL_TILING_CCS: return I915_TILING_NONE; } |