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authorConnor Abbott <[email protected]>2019-06-05 12:37:46 +0200
committerConnor Abbott <[email protected]>2019-06-06 17:14:28 +0200
commit1d55b0da59dd4b863df7c35f697409e80b1ffd50 (patch)
treec69061e805110e1d4ac94633d5d94277316d7ba8 /src
parent10895c39c338d9e4a00c86590bdfd4e30bd2acfe (diff)
radeonsi: Don't force dcc disable for loads
When e9d935ed0e2 added force_dcc_off(), we forced it off for any preloaded image descriptor which had stores associated with them, since the same preloaded descriptors were used for loads and stores. However, when the preloading was removed in 16be87c9042, the existing logic was kept despite it not being necessary anymore. The comment above force_dcc_off() only mentions stores, so only force DCC off for stores. Cc: Nicolai Hähnle <[email protected]> Cc: Marek Olšák <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_nir.c6
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c7
2 files changed, 0 insertions, 13 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 72e6ffbac8a..a852283aff0 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -997,16 +997,10 @@ si_nir_load_sampler_desc(struct ac_shader_abi *abi,
bool write, bool bindless)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
- const struct tgsi_shader_info *info = &ctx->shader->selector->info;
LLVMBuilderRef builder = ctx->ac.builder;
unsigned const_index = base_index + constant_index;
bool dcc_off = write;
- /* TODO: images_store and images_atomic are not set */
- if (!dynamic_index && image &&
- (info->images_store | info->images_atomic) & (1 << const_index))
- dcc_off = true;
-
assert(!descriptor_set);
assert(!image || desc_type == AC_DESC_IMAGE || desc_type == AC_DESC_BUFFER);
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
index c5704bc0eae..53075f1b546 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_mem.c
@@ -218,15 +218,8 @@ image_fetch_rsrc(
bool dcc_off = is_store;
if (!image->Register.Indirect) {
- const struct tgsi_shader_info *info = bld_base->info;
- unsigned images_writemask = info->images_store |
- info->images_atomic;
-
index = LLVMConstInt(ctx->i32,
si_get_image_slot(image->Register.Index), 0);
-
- if (images_writemask & (1 << image->Register.Index))
- dcc_off = true;
} else {
/* From the GL_ARB_shader_image_load_store extension spec:
*