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authorRhys Perry <[email protected]>2019-09-12 19:55:12 +0100
committerTimur Kristóf <[email protected]>2019-10-10 09:57:53 +0200
commitc24cd975159b7053aaf51ca3b684f23890a6b07e (patch)
tree11ed17002718d34c38f52ffb13739d6020f9746b /src
parent818bdab796772da77a363f0a96e8895736591aac (diff)
aco: Assemble opsel in VOP3 instructions.
Signed-off-by: Rhys Perry <[email protected]> Reviewed-By: Timur Kristóf <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/compiler/aco_assembler.cpp3
-rw-r--r--src/amd/compiler/aco_ir.h2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp
index 272be088589..34eb9fb730f 100644
--- a/src/amd/compiler/aco_assembler.cpp
+++ b/src/amd/compiler/aco_assembler.cpp
@@ -475,7 +475,6 @@ void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction*
opcode = opcode + 0x270;
}
- // TODO: op_sel
uint32_t encoding;
if (ctx.chip_class <= GFX9) {
encoding = (0b110100 << 26);
@@ -487,6 +486,8 @@ void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction*
encoding |= (vop3->clamp ? 1 : 0) << 15;
for (unsigned i = 0; i < 3; i++)
encoding |= vop3->abs[i] << (8+i);
+ for (unsigned i = 0; i < 4; i++)
+ encoding |= vop3->opsel[i] << (11+i);
if (instr->definitions.size() == 2)
encoding |= instr->definitions[1].physReg() << 8;
encoding |= (0xFF & instr->definitions[0].physReg().reg);
diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h
index b393ef15283..22692516098 100644
--- a/src/amd/compiler/aco_ir.h
+++ b/src/amd/compiler/aco_ir.h
@@ -665,7 +665,7 @@ struct VOPC_instruction : public Instruction {
struct VOP3A_instruction : public Instruction {
bool abs[3];
- bool opsel[3];
+ bool opsel[4];
bool clamp;
unsigned omod;
bool neg[3];