From c24cd975159b7053aaf51ca3b684f23890a6b07e Mon Sep 17 00:00:00 2001 From: Rhys Perry Date: Thu, 12 Sep 2019 19:55:12 +0100 Subject: aco: Assemble opsel in VOP3 instructions. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Rhys Perry Reviewed-By: Timur Kristóf Reviewed-by: Daniel Schürmann --- src/amd/compiler/aco_assembler.cpp | 3 ++- src/amd/compiler/aco_ir.h | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp index 272be088589..34eb9fb730f 100644 --- a/src/amd/compiler/aco_assembler.cpp +++ b/src/amd/compiler/aco_assembler.cpp @@ -475,7 +475,6 @@ void emit_instruction(asm_context& ctx, std::vector& out, Instruction* opcode = opcode + 0x270; } - // TODO: op_sel uint32_t encoding; if (ctx.chip_class <= GFX9) { encoding = (0b110100 << 26); @@ -487,6 +486,8 @@ void emit_instruction(asm_context& ctx, std::vector& out, Instruction* encoding |= (vop3->clamp ? 1 : 0) << 15; for (unsigned i = 0; i < 3; i++) encoding |= vop3->abs[i] << (8+i); + for (unsigned i = 0; i < 4; i++) + encoding |= vop3->opsel[i] << (11+i); if (instr->definitions.size() == 2) encoding |= instr->definitions[1].physReg() << 8; encoding |= (0xFF & instr->definitions[0].physReg().reg); diff --git a/src/amd/compiler/aco_ir.h b/src/amd/compiler/aco_ir.h index b393ef15283..22692516098 100644 --- a/src/amd/compiler/aco_ir.h +++ b/src/amd/compiler/aco_ir.h @@ -665,7 +665,7 @@ struct VOPC_instruction : public Instruction { struct VOP3A_instruction : public Instruction { bool abs[3]; - bool opsel[3]; + bool opsel[4]; bool clamp; unsigned omod; bool neg[3]; -- cgit v1.2.3