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authorSamuel Pitoiset <[email protected]>2019-09-11 09:19:21 +0200
committerSamuel Pitoiset <[email protected]>2019-09-16 12:08:22 +0200
commit63b20fb0cf3e6a8f4027859141e3380c7932c43f (patch)
treed3498bb8c820414214a2287edbafc113e84f8d0a /src
parent7314f6ef97cd3dabb75774abc6283a8813e158ca (diff)
radv/gfx10: make sure to wait for idle before clearing GDS
Otherwise the next streamout operation will overwrite GDS. This can be improved by tracking if there is a streamout operation in flight. Currently the driver unconditionally flushes but that doesn't matter much as NGG streamout is disabled by default. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/amd/vulkan/radv_cmd_buffer.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index f0fdad68a94..7e3dd7de534 100644
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -5943,6 +5943,14 @@ gfx10_emit_streamout_begin(struct radv_cmd_buffer *cmd_buffer,
assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10);
assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS);
+ /* Sync because the next streamout operation will overwrite GDS and we
+ * have to make sure it's idle.
+ * TODO: Improve by tracking if there is a streamout operation in
+ * flight.
+ */
+ cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH;
+ si_emit_cache_flush(cmd_buffer);
+
for_each_bit(i, so->enabled_mask) {
int32_t counter_buffer_idx = i - firstCounterBuffer;
if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount)