From 63b20fb0cf3e6a8f4027859141e3380c7932c43f Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 11 Sep 2019 09:19:21 +0200 Subject: radv/gfx10: make sure to wait for idle before clearing GDS Otherwise the next streamout operation will overwrite GDS. This can be improved by tracking if there is a streamout operation in flight. Currently the driver unconditionally flushes but that doesn't matter much as NGG streamout is disabled by default. Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen --- src/amd/vulkan/radv_cmd_buffer.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src') diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index f0fdad68a94..7e3dd7de534 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -5943,6 +5943,14 @@ gfx10_emit_streamout_begin(struct radv_cmd_buffer *cmd_buffer, assert(cmd_buffer->device->physical_device->rad_info.chip_class >= GFX10); assert(firstCounterBuffer + counterBufferCount <= MAX_SO_BUFFERS); + /* Sync because the next streamout operation will overwrite GDS and we + * have to make sure it's idle. + * TODO: Improve by tracking if there is a streamout operation in + * flight. + */ + cmd_buffer->state.flush_bits |= RADV_CMD_FLAG_VS_PARTIAL_FLUSH; + si_emit_cache_flush(cmd_buffer); + for_each_bit(i, so->enabled_mask) { int32_t counter_buffer_idx = i - firstCounterBuffer; if (counter_buffer_idx >= 0 && counter_buffer_idx >= counterBufferCount) -- cgit v1.2.3