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authorBoyuan Zhang <[email protected]>2019-06-17 15:00:53 -0400
committerLeo Liu <[email protected]>2019-07-26 14:33:09 -0400
commit5115c25bb877d62781c23a31735cb3f70811383b (patch)
treec2aab0df609792e6c9ff91a2ae5fdc6c58d69366 /src
parent9aaf3aaf5d8a88e05cf2d2dd4a455a64789bcced (diff)
radeon/uvd: enable rate control for hevc encoding
Set cu_qp_delta_enable_flag on when rate control is enabled, and set it off when rate control is disabled (e.g. constant qp). Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673 Cc: [email protected] V2: fix typo and add bugzilla info Signed-off-by: Boyuan Zhang <[email protected]> Acked-by: Leo Liu <[email protected]>
Diffstat (limited to 'src')
-rw-r--r--src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
index b1b49c28801..7e5be33ec54 100644
--- a/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
+++ b/src/gallium/drivers/radeon/radeon_uvd_enc_1_1.c
@@ -573,7 +573,13 @@ radeon_uvd_enc_nalu_pps_hevc(struct radeon_uvd_encoder *enc)
enc->enc_pic.hevc_spec_misc.
constrained_intra_pred_flag, 1);
radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);
- radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);
+ if (enc->enc_pic.rc_session_init.rate_control_method ==
+ RENC_UVD_RATE_CONTROL_METHOD_NONE)
+ radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);
+ else {
+ radeon_uvd_enc_code_fixed_bits(enc, 0x1, 1);
+ radeon_uvd_enc_code_ue(enc, 0x0);
+ }
radeon_uvd_enc_code_se(enc, enc->enc_pic.hevc_deblock.cb_qp_offset);
radeon_uvd_enc_code_se(enc, enc->enc_pic.hevc_deblock.cr_qp_offset);
radeon_uvd_enc_code_fixed_bits(enc, 0x0, 1);