diff options
| author | Alyssa Rosenzweig <[email protected]> | 2020-05-13 11:05:34 -0400 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-05-21 17:49:14 +0000 |
| commit | fde1f2b7cb060c1fd5a00e1447bf69b8bbd15e8e (patch) | |
| tree | e37b4473e2f1e2da93217296d328d7078a1aba58 /src/panfrost | |
| parent | 4e4c9f5f5ac4373dca5177cfcecc484a476cbf36 (diff) | |
pan/mdg: Fix type checking issues with compute
SSBO and barriers.
Signed-off-by: Alyssa Rosenzweig <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>
Diffstat (limited to 'src/panfrost')
| -rw-r--r-- | src/panfrost/midgard/midgard_address.c | 3 | ||||
| -rw-r--r-- | src/panfrost/midgard/midgard_compile.c | 1 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/panfrost/midgard/midgard_address.c b/src/panfrost/midgard/midgard_address.c index 7b8e01811d2..c0d17775517 100644 --- a/src/panfrost/midgard/midgard_address.c +++ b/src/panfrost/midgard/midgard_address.c @@ -178,6 +178,7 @@ mir_set_offset(compiler_context *ctx, midgard_instruction *ins, nir_src *offset, if (!offset->is_ssa) { ins->load_store.arg_1 |= is_shared ? 0x6E : 0x7E; ins->src[2] = nir_src_index(ctx, offset); + ins->src_types[2] = nir_type_uint | nir_src_bit_size(*offset); return; } @@ -186,12 +187,14 @@ mir_set_offset(compiler_context *ctx, midgard_instruction *ins, nir_src *offset, if (match.A.def) { ins->src[1] = nir_ssa_index(match.A.def); ins->swizzle[1][0] = match.A.comp; + ins->src_types[1] = nir_type_uint | match.A.def->bit_size; } else ins->load_store.arg_1 |= is_shared ? 0x6E : 0x7E; if (match.B.def) { ins->src[2] = nir_ssa_index(match.B.def); ins->swizzle[2][0] = match.B.comp; + ins->src_types[2] = nir_type_uint | match.B.def->bit_size; } else ins->load_store.arg_2 = 0x1E; diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c index 1ca2df891f6..03829a6427e 100644 --- a/src/panfrost/midgard/midgard_compile.c +++ b/src/panfrost/midgard/midgard_compile.c @@ -1388,6 +1388,7 @@ emit_control_barrier(compiler_context *ctx) { midgard_instruction ins = { .type = TAG_TEXTURE_4, + .dest = ~0, .src = { ~0, ~0, ~0, ~0 }, .texture = { .op = TEXTURE_OP_BARRIER, |