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authorAlyssa Rosenzweig <[email protected]>2019-09-24 09:06:37 -0400
committerAlyssa Rosenzweig <[email protected]>2019-09-30 08:40:13 -0400
commit7cf493241061d2d942a8555ec8cfa08be3254045 (patch)
treecb6abad155c1a94c116ff200b72e6626e2c68645 /src/panfrost/midgard
parentc9ce5a92a0d9e052ec4fc38e88d9aed81200489a (diff)
pan/midgard: Extend csel_swizzle to branches
Conditions for branches don't have a swizzle explicitly in the emitted binary, but they do implicitly get swizzled in whatever instruction wrote r31, so we need to handle that. Signed-off-by: Alyssa Rosenzweig <[email protected]>
Diffstat (limited to 'src/panfrost/midgard')
-rw-r--r--src/panfrost/midgard/compiler.h4
-rw-r--r--src/panfrost/midgard/midgard_compile.c2
-rw-r--r--src/panfrost/midgard/mir.c9
3 files changed, 10 insertions, 5 deletions
diff --git a/src/panfrost/midgard/compiler.h b/src/panfrost/midgard/compiler.h
index 780e4323554..60d5b9d0e20 100644
--- a/src/panfrost/midgard/compiler.h
+++ b/src/panfrost/midgard/compiler.h
@@ -88,8 +88,8 @@ typedef struct midgard_instruction {
unsigned src[3];
unsigned dest;
- /* Swizzle for the conditional for a csel */
- unsigned csel_swizzle;
+ /* Swizzle for the conditional for a csel/branch */
+ unsigned cond_swizzle;
/* Special fields for an ALU instruction */
midgard_reg_info registers;
diff --git a/src/panfrost/midgard/midgard_compile.c b/src/panfrost/midgard/midgard_compile.c
index 95ec48e9563..337f46f2e0d 100644
--- a/src/panfrost/midgard/midgard_compile.c
+++ b/src/panfrost/midgard/midgard_compile.c
@@ -1095,7 +1095,7 @@ emit_alu(compiler_context *ctx, nir_alu_instr *instr)
};
if (nr_inputs == 3) {
- ins.csel_swizzle = SWIZZLE_FROM_ARRAY(nirmods[2]->swizzle);
+ ins.cond_swizzle = SWIZZLE_FROM_ARRAY(nirmods[2]->swizzle);
assert(!nirmods[2]->abs);
assert(!nirmods[2]->negate);
}
diff --git a/src/panfrost/midgard/mir.c b/src/panfrost/midgard/mir.c
index 9e5ba7abcb0..faeac16d18d 100644
--- a/src/panfrost/midgard/mir.c
+++ b/src/panfrost/midgard/mir.c
@@ -42,8 +42,8 @@ unsigned
mir_get_swizzle(midgard_instruction *ins, unsigned idx)
{
if (ins->type == TAG_ALU_4) {
- if (idx == 2)
- return ins->csel_swizzle;
+ if (idx == 2 || ins->compact_branch)
+ return ins->cond_swizzle;
unsigned b = (idx == 0) ? ins->alu.src1 : ins->alu.src2;
@@ -105,6 +105,11 @@ void
mir_set_swizzle(midgard_instruction *ins, unsigned idx, unsigned new)
{
if (ins->type == TAG_ALU_4) {
+ if (idx == 2 || ins->compact_branch) {
+ ins->cond_swizzle = new;
+ return;
+ }
+
unsigned b = (idx == 0) ? ins->alu.src1 : ins->alu.src2;
midgard_vector_alu_src s =