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authorKenneth Graunke <[email protected]>2017-12-13 09:45:49 -0800
committerKenneth Graunke <[email protected]>2017-12-14 00:37:33 -0800
commitfd3fc5f5479410ffc87852c7d3a391e3ec548009 (patch)
tree81d822c831a29810708350909fefc87fb873b6ec /src/mesa
parent546633dce22614f06aec1679e3ec8dd9c5b26eb0 (diff)
i965: Don't allocate an MCS for 16x MSAA and width > 8192.
The hardware doesn't support this, and isl_surf_get_mcs_surf will fail. I feel a bit bad replicating this logic, but we want to decide up front. This fixes the following test when run with --deqp-surface-width=16384: - GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_error_blitframebuffer_multisampled_framebuffers_different_sample_count Reviewed-by: Jason Ekstrand <[email protected]> Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index c1a4ce184f5..ead0c359c0f 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -73,6 +73,10 @@ intel_miptree_supports_mcs(struct brw_context *brw,
if (devinfo->gen < 7)
return false;
+ /* See isl_surf_get_mcs_surf for details. */
+ if (mt->surf.samples == 16 && mt->surf.logical_level0_px.width > 8192)
+ return false;
+
/* In Gen7, IMS layout is only used for depth and stencil buffers. */
switch (_mesa_get_format_base_format(mt->format)) {
case GL_DEPTH_COMPONENT: