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authorKenneth Graunke <[email protected]>2014-05-09 22:22:24 -0700
committerKenneth Graunke <[email protected]>2014-06-26 11:50:34 -0700
commite10311be9f61230de7f06e9fb30834835ba3677d (patch)
tree30fde51625ae4066811dca7fafbee66819758aa6 /src/mesa
parentfd7718768929ff7fd1460bafc32f7b8be75a3140 (diff)
i965: Drop SINT workaround for CMS layout on Broadwell.
According to the documentation, we don't need this SINT workaround on Broadwell. (Or at least, it doesn't mention that we need it.) Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jordan Justen <[email protected]> Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/intel_mipmap_tree.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index 4c71e41188d..58e09b74d95 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -87,9 +87,7 @@ compute_msaa_layout(struct brw_context *brw, mesa_format format, GLenum target)
* would require converting between CMS and UMS MSAA layouts on the fly,
* which is expensive.
*/
- if (_mesa_get_format_datatype(format) == GL_INT) {
- /* TODO: is this workaround needed for future chipsets? */
- assert(brw->gen == 7);
+ if (brw->gen == 7 && _mesa_get_format_datatype(format) == GL_INT) {
return INTEL_MSAA_LAYOUT_UMS;
} else {
return INTEL_MSAA_LAYOUT_CMS;