diff options
author | Topi Pohjolainen <[email protected]> | 2015-12-10 16:03:03 +0200 |
---|---|---|
committer | Topi Pohjolainen <[email protected]> | 2016-02-16 08:52:24 +0200 |
commit | dd37b6aaa9829564387cd3ae9fc42c1250a78082 (patch) | |
tree | 4b2d283c9887b99b483e554e0919f4c9abf386dc /src/mesa | |
parent | 2bd58790e2e2015cbf5033786cc16e4e4849ef21 (diff) |
i965/gen9: Refactor msrt mcs initialization
This will be re-used to initialize auxiliary buffers in lossless
compression case.
Signed-off-by: Topi Pohjolainen <[email protected]>
Reviewed-by: Ben Widawsky <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r-- | src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 36 |
1 files changed, 22 insertions, 14 deletions
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c index 6c6fbef0167..a0722682417 100644 --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c @@ -1449,6 +1449,27 @@ intel_miptree_copy_teximage(struct brw_context *brw, intel_obj->needs_validate = true; } +static void +intel_miptree_init_mcs(struct brw_context *brw, + struct intel_mipmap_tree *mt, + int init_value) +{ + /* From the Ivy Bridge PRM, Vol 2 Part 1 p326: + * + * When MCS buffer is enabled and bound to MSRT, it is required that it + * is cleared prior to any rendering. + * + * Since we don't use the MCS buffer for any purpose other than rendering, + * it makes sense to just clear it immediately upon allocation. + * + * Note: the clear value for MCS buffers is all 1's, so we memset to 0xff. + */ + void *data = intel_miptree_map_raw(brw, mt->mcs_mt); + memset(data, init_value, mt->mcs_mt->total_height * mt->mcs_mt->pitch); + intel_miptree_unmap_raw(mt->mcs_mt); + mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR; +} + static bool intel_miptree_alloc_mcs(struct brw_context *brw, struct intel_mipmap_tree *mt, @@ -1505,20 +1526,7 @@ intel_miptree_alloc_mcs(struct brw_context *brw, 0 /* num_samples */, mcs_flags); - /* From the Ivy Bridge PRM, Vol 2 Part 1 p326: - * - * When MCS buffer is enabled and bound to MSRT, it is required that it - * is cleared prior to any rendering. - * - * Since we don't use the MCS buffer for any purpose other than rendering, - * it makes sense to just clear it immediately upon allocation. - * - * Note: the clear value for MCS buffers is all 1's, so we memset to 0xff. - */ - void *data = intel_miptree_map_raw(brw, mt->mcs_mt); - memset(data, 0xff, mt->mcs_mt->total_height * mt->mcs_mt->pitch); - intel_miptree_unmap_raw(mt->mcs_mt); - mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_CLEAR; + intel_miptree_init_mcs(brw, mt, 0xFF); return mt->mcs_mt; } |