diff options
| author | Kenneth Graunke <[email protected]> | 2013-02-12 21:51:17 -0800 |
|---|---|---|
| committer | Kenneth Graunke <[email protected]> | 2013-05-01 10:42:51 -0700 |
| commit | b5b6460c40e1c46f6af6a490485132ea0864572c (patch) | |
| tree | 34eacf7725148a3cfc0bd0802f9b066c62764f87 /src/mesa | |
| parent | e2f887b243fd34ef82e4782a968baca485b07b15 (diff) | |
i965/vs: Fix textureGrad() with shadow samplers on Haswell.
The shadow comparitor needs to be loaded into the Z component of the
last DWord.
Fixes es3conform's shadow_execution_vert and oglconform's
shadow-grad advanced.textureGrad.1D tests on Haswell.
NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 31da01f143b..3b0687f615a 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2271,7 +2271,7 @@ vec4_visitor::visit(ir_texture *ir) emit(MOV(dst_reg(MRF, param_base, ir->coordinate->type, zero_mask), src_reg(0))); /* Load the shadow comparitor */ - if (ir->shadow_comparitor) { + if (ir->shadow_comparitor && ir->op != ir_txd) { emit(MOV(dst_reg(MRF, param_base + 1, ir->shadow_comparitor->type, WRITEMASK_X), shadow_comparitor)); @@ -2317,12 +2317,18 @@ vec4_visitor::visit(ir_texture *ir) emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_YW), dPdy)); inst->mlen++; - if (ir->type->vector_elements == 3) { + if (ir->type->vector_elements == 3 || ir->shadow_comparitor) { dPdx.swizzle = BRW_SWIZZLE_ZZZZ; dPdy.swizzle = BRW_SWIZZLE_ZZZZ; emit(MOV(dst_reg(MRF, param_base + 2, type, WRITEMASK_X), dPdx)); emit(MOV(dst_reg(MRF, param_base + 2, type, WRITEMASK_Y), dPdy)); inst->mlen++; + + if (ir->shadow_comparitor) { + emit(MOV(dst_reg(MRF, param_base + 2, + ir->shadow_comparitor->type, WRITEMASK_Z), + shadow_comparitor)); + } } } else /* intel->gen == 4 */ { emit(MOV(dst_reg(MRF, param_base + 1, type, WRITEMASK_XYZ), dPdx)); |