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authorPauli Nieminen <[email protected]>2009-08-22 02:43:41 +0300
committerPauli Nieminen <[email protected]>2009-08-22 02:54:34 +0300
commit6c5c46f842c80d4397d7971bea1a439fcd5e57d1 (patch)
treeb25c2ca8e680c3d7d470291533fcb709f3dbca39 /src/mesa
parentc0f4063703265fc4009e6cadc2de79f553f99b1c (diff)
r300: Fix dri1 not to emit state that is not supported in old drm.
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/r300/r300_cmdbuf.c31
-rw-r--r--src/mesa/drivers/dri/r300/r300_ioctl.c19
2 files changed, 35 insertions, 15 deletions
diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 565c4b669f6..b08af116a12 100644
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -252,6 +252,9 @@ static int check_cb_offset(GLcontext *ctx, struct radeon_state_atom * atom)
uint32_t dw = 6 + 3 + 16;
if (r300->radeon.radeonScreen->kernel_mm)
dw += 2;
+ if (!r300->radeon.radeonScreen->driScreen->dri2.enabled) {
+ dw -= 3 + 16;
+ }
return dw;
}
@@ -710,18 +713,22 @@ void r300InitCmdBuf(r300ContextPtr r300)
/* VPU only on TCL */
if (has_tcl) {
int i;
- ALLOC_STATE(vap_flush, always, 10, 0);
- /* flush processing vertices */
- r300->hw.vap_flush.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
- r300->hw.vap_flush.cmd[1] = 0;
- r300->hw.vap_flush.cmd[2] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_DSTCACHE_CTLSTAT, 1);
- r300->hw.vap_flush.cmd[3] = R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D;
- r300->hw.vap_flush.cmd[4] = cmdpacket0(r300->radeon.radeonScreen, RADEON_WAIT_UNTIL, 1);
- r300->hw.vap_flush.cmd[5] = RADEON_WAIT_3D_IDLECLEAN;
- r300->hw.vap_flush.cmd[6] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
- r300->hw.vap_flush.cmd[7] = 0xffffff;
- r300->hw.vap_flush.cmd[8] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PVS_STATE_FLUSH_REG, 1);
- r300->hw.vap_flush.cmd[9] = 0;
+ if (r300->radeon.radeonScreen->kernel_mm) {
+ ALLOC_STATE(vap_flush, always, 10, 0);
+ /* flush processing vertices */
+ r300->hw.vap_flush.cmd[0] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
+ r300->hw.vap_flush.cmd[1] = 0;
+ r300->hw.vap_flush.cmd[2] = cmdpacket0(r300->radeon.radeonScreen, R300_RB3D_DSTCACHE_CTLSTAT, 1);
+ r300->hw.vap_flush.cmd[3] = R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D;
+ r300->hw.vap_flush.cmd[4] = cmdpacket0(r300->radeon.radeonScreen, RADEON_WAIT_UNTIL, 1);
+ r300->hw.vap_flush.cmd[5] = RADEON_WAIT_3D_IDLECLEAN;
+ r300->hw.vap_flush.cmd[6] = cmdpacket0(r300->radeon.radeonScreen, R300_SC_SCREENDOOR, 1);
+ r300->hw.vap_flush.cmd[7] = 0xffffff;
+ r300->hw.vap_flush.cmd[8] = cmdpacket0(r300->radeon.radeonScreen, R300_VAP_PVS_STATE_FLUSH_REG, 1);
+ r300->hw.vap_flush.cmd[9] = 0;
+ } else {
+ ALLOC_STATE(vap_flush, never, 10, 0);
+ }
ALLOC_STATE(vpi, vpu, R300_VPI_CMDSIZE, 0);
diff --git a/src/mesa/drivers/dri/r300/r300_ioctl.c b/src/mesa/drivers/dri/r300/r300_ioctl.c
index bc33b607cff..3303078e39a 100644
--- a/src/mesa/drivers/dri/r300/r300_ioctl.c
+++ b/src/mesa/drivers/dri/r300/r300_ioctl.c
@@ -507,7 +507,15 @@ static void r300EmitClearState(GLcontext * ctx)
R500_ALU_RGBA_A_SWIZ_0;
r500fp.cmd[7] = 0;
- emit_r500fp(ctx, &r500fp);
+ if (r300->radeon.radeonScreen->kernel_mm) {
+ emit_r500fp(ctx, &r500fp);
+ } else {
+ int dwords = r500fp.check(ctx,&r500fp);
+ BEGIN_BATCH_NO_AUTOSTATE(dwords);
+ OUT_BATCH_TABLE(r500fp.cmd, dwords);
+ END_BATCH();
+ }
+
}
BEGIN_BATCH(2);
@@ -593,14 +601,19 @@ static void r300EmitClearState(GLcontext * ctx)
PVS_SRC_REG_INPUT, NEGATE_NONE);
vpu.cmd[8] = 0x0;
- {
+ if (r300->radeon.radeonScreen->kernel_mm) {
int dwords = r300->hw.vap_flush.check(ctx,&r300->hw.vap_flush);
BEGIN_BATCH_NO_AUTOSTATE(dwords);
OUT_BATCH_TABLE(r300->hw.vap_flush.cmd, dwords);
END_BATCH();
+ emit_vpu(ctx, &vpu);
+ } else {
+ int dwords = vpu.check(ctx,&vpu);
+ BEGIN_BATCH_NO_AUTOSTATE(dwords);
+ OUT_BATCH_TABLE(vpu.cmd, dwords);
+ END_BATCH();
}
- emit_vpu(ctx, &vpu);
}
}