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authorJason Ekstrand <[email protected]>2019-07-18 09:59:44 -0500
committerJason Ekstrand <[email protected]>2019-07-29 23:30:26 +0000
commit4bb6e6817ec5d627d58e499ca09f1f40641a1acd (patch)
treec5f65a2aa8cff090908f09d98fefc83041ae8c3e /src/mesa
parent44268b1c72e327a812678f123000942083407944 (diff)
intel: Use a system value for gl_FragCoord
It's kind-of an anomaly that the Intel drivers are still treating gl_FragCoord as an input. It also makes zero sense because we have to special-case it in the back-end. Because ANV is the only user of nir_lower_wpos_center, we go ahead and just update it to look for nir_intrinsic_load_frag_coord as part of this patch. Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c1
-rw-r--r--src/mesa/drivers/dri/i965/brw_program.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index 3783d1532e9..91053842aa1 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -621,6 +621,7 @@ brw_initialize_context_constants(struct brw_context *brw)
if (devinfo->gen >= 5 || devinfo->is_g4x)
ctx->Const.MaxClipPlanes = 8;
+ ctx->Const.GLSLFragCoordIsSysVal = true;
ctx->Const.GLSLTessLevelsAsInputs = true;
ctx->Const.PrimitiveRestartForPatches = true;
diff --git a/src/mesa/drivers/dri/i965/brw_program.c b/src/mesa/drivers/dri/i965/brw_program.c
index 0e91612d845..b69b032a9c2 100644
--- a/src/mesa/drivers/dri/i965/brw_program.c
+++ b/src/mesa/drivers/dri/i965/brw_program.c
@@ -262,6 +262,7 @@ brwProgramStringNotify(struct gl_context *ctx,
if (newFP == curFP)
brw->ctx.NewDriverState |= BRW_NEW_FRAGMENT_PROGRAM;
+ _mesa_program_fragment_position_to_sysval(&newFP->program);
newFP->id = get_new_program_id(brw->screen);
prog->nir = brw_create_nir(brw, NULL, prog, MESA_SHADER_FRAGMENT, true);