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authorKenneth Graunke <[email protected]>2015-11-17 16:31:14 -0800
committerKenneth Graunke <[email protected]>2015-11-17 16:33:48 -0800
commit27b1d344384ef89faf6d321bf4625d08ba6ff3bf (patch)
tree24f6554d1fe228784c8e43799d066eaf653378af /src/mesa
parentc531d409274328c9713221f33f1d24e0f4877451 (diff)
i965: Fix PIPE_CONTOL typo.
PIPE_CONTOL!!!
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/gen7_urb.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen7_urb.c b/src/mesa/drivers/dri/i965/gen7_urb.c
index 69162171c4e..161de77e156 100644
--- a/src/mesa/drivers/dri/i965/gen7_urb.c
+++ b/src/mesa/drivers/dri/i965/gen7_urb.c
@@ -118,7 +118,7 @@ gen7_emit_push_constant_state(struct brw_context *brw, unsigned vs_size,
/* From p292 of the Ivy Bridge PRM (11.2.4 3DSTATE_PUSH_CONSTANT_ALLOC_PS):
*
- * A PIPE_CONTOL command with the CS Stall bit set must be programmed
+ * A PIPE_CONTROL command with the CS Stall bit set must be programmed
* in the ring after this instruction.
*
* No such restriction exists for Haswell or Baytrail.