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authorEric Anholt <[email protected]>2012-03-12 12:21:20 -0700
committerEric Anholt <[email protected]>2012-03-16 11:55:35 -0700
commitbddb2edab616d30f7894cfff7071a70d273a848e (patch)
tree08a6a41792cd52a13ef5ac75b8e8fb2b3f2a912e /src/mesa
parentc0795742a38e0aab59309c1ec71d980e493237e2 (diff)
i965: Add disasm for gen6+ UIP/JIP on BREAK/CONT/HALT.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'src/mesa')
-rw-r--r--src/mesa/drivers/dri/i965/brw_disasm.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c
index 187bc0ab25d..aebfa7313a1 100644
--- a/src/mesa/drivers/dri/i965/brw_disasm.c
+++ b/src/mesa/drivers/dri/i965/brw_disasm.c
@@ -1118,6 +1118,10 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen)
inst->header.opcode == BRW_OPCODE_ENDIF ||
inst->header.opcode == BRW_OPCODE_WHILE)) {
format (file, " %d", inst->bits1.branch_gen6.jump_count);
+ } else if (gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK ||
+ inst->header.opcode == BRW_OPCODE_CONTINUE ||
+ inst->header.opcode == BRW_OPCODE_HALT)) {
+ format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip);
} else if (inst->header.opcode == BRW_OPCODE_JMPI) {
format (file, " %d", inst->bits3.d);
}