From bddb2edab616d30f7894cfff7071a70d273a848e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 12 Mar 2012 12:21:20 -0700 Subject: i965: Add disasm for gen6+ UIP/JIP on BREAK/CONT/HALT. Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_disasm.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mesa') diff --git a/src/mesa/drivers/dri/i965/brw_disasm.c b/src/mesa/drivers/dri/i965/brw_disasm.c index 187bc0ab25d..aebfa7313a1 100644 --- a/src/mesa/drivers/dri/i965/brw_disasm.c +++ b/src/mesa/drivers/dri/i965/brw_disasm.c @@ -1118,6 +1118,10 @@ int brw_disasm (FILE *file, struct brw_instruction *inst, int gen) inst->header.opcode == BRW_OPCODE_ENDIF || inst->header.opcode == BRW_OPCODE_WHILE)) { format (file, " %d", inst->bits1.branch_gen6.jump_count); + } else if (gen >= 6 && (inst->header.opcode == BRW_OPCODE_BREAK || + inst->header.opcode == BRW_OPCODE_CONTINUE || + inst->header.opcode == BRW_OPCODE_HALT)) { + format (file, " %d %d", inst->bits3.break_cont.uip, inst->bits3.break_cont.jip); } else if (inst->header.opcode == BRW_OPCODE_JMPI) { format (file, " %d", inst->bits3.d); } -- cgit v1.2.3