mesa/st/glsl_to_tgsi: Mark first write as unconditional when appropriate

In the register lifetime estimation if the first write is unconditional or
conditional but not within a loop then this is an unconditional dominant
write in the sense of register life time estimation.
Add a test case and record the write accordingly.

Fixes: 807e2539e512ca6c96f059da855473eb7be99ba1 ("mesa/st/glsl_to_tgsi: Add
tracking of ifelse writes in register merging")
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104803
Signed-off-by: Gert Wollny <[email protected]>
Reviewed-by: Brian Paul <[email protected]>

1 files changed, 23 insertions, 1 deletions

diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp
index 3a00b337496..6921a643b74 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi_temprename.cpp
@@ -197,6 +197,7 @@ private:
    static const int write_is_conditional = -1;
    static const int conditionality_unresolved = 0;
    static const int conditionality_untouched;
+   static const int write_is_unconditional;
 
    /* A bit field tracking the nexting levels of if-else clauses where the
     * temporary has (so far) been written to in the if branch, but not in the
@@ -220,6 +221,9 @@ private:
 const int
 temp_comp_access::conditionality_untouched = numeric_limits<int>::max();
 
+const int
+temp_comp_access::write_is_unconditional = numeric_limits<int>::max() - 1;
+
 /* Class to track the access to all components of a temporary register. */
 class temp_access {
 public:
@@ -566,6 +570,13 @@ void temp_comp_access::record_read(int line, prog_scope *scope)
       first_read_scope = scope;
    }
 
+   /* If the conditionality of the first write is already resolved then
+    * no further checks are required.
+    */
+   if (conditionality_in_loop_id == write_is_unconditional ||
+       conditionality_in_loop_id == write_is_conditional)
+      return;
+
    /* Check whether we are in a condition within a loop */
    const prog_scope *ifelse_scope = scope->in_ifelse_scope();
    const prog_scope *enclosing_loop;
@@ -612,9 +623,20 @@ void temp_comp_access::record_write(int line, prog_scope *scope)
    if (first_write < 0) {
       first_write = line;
       first_write_scope = scope;
+
+      /* If the first write we encounter is not in a conditional branch, or
+       * the conditional write is not within a loop, then this is to be
+       * considered an unconditional dominant write.
+       */
+      const prog_scope *conditional = scope->enclosing_conditional();
+      if (!conditional || !conditional->innermost_loop()) {
+         conditionality_in_loop_id = write_is_unconditional;
+      }
    }
 
-   if (conditionality_in_loop_id == write_is_conditional)
+   /* The conditionality of the first write is already resolved. */
+   if (conditionality_in_loop_id == write_is_unconditional ||
+       conditionality_in_loop_id == write_is_conditional)
       return;
 
    /* If the nesting depth is larger than the supported level,