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authorNicolai Hähnle <[email protected]>2016-11-03 11:00:36 +0100
committerNicolai Hähnle <[email protected]>2016-11-04 10:31:02 +0100
commite4b378800eff13752dcfe1f5c6b640444208d543 (patch)
tree419a50fba6a57722cd75b7a3048a71a910a9c416 /src/mesa/state_tracker/st_glsl_to_tgsi.cpp
parentaef7eb4cacbb241dc895f3e08dba4c91052a98a8 (diff)
st/glsl_to_tgsi: fix dvec[34] loads from SSBO
When splitting up loads, we have to add 16 bytes to the offset for the high components, just like already happens for stores. Fixes arb_gpu_shader_fp64@shader_storage@layout-std140-fp64-shader. Cc: 13.0 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
Diffstat (limited to 'src/mesa/state_tracker/st_glsl_to_tgsi.cpp')
-rw-r--r--src/mesa/state_tracker/st_glsl_to_tgsi.cpp10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 5b53c40485d..882e959655e 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -774,9 +774,9 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op,
int i = u_bit_scan(&writemask);
- /* before emitting the instruction, see if we have to adjust store
+ /* before emitting the instruction, see if we have to adjust load / store
* address */
- if (i > 1 && inst->op == TGSI_OPCODE_STORE &&
+ if (i > 1 && (inst->op == TGSI_OPCODE_LOAD || inst->op == TGSI_OPCODE_STORE) &&
addr.file == PROGRAM_UNDEFINED) {
/* We have to advance the buffer address by 16 */
addr = get_temp(glsl_type::uint_type);
@@ -784,7 +784,6 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op,
inst->src[0], st_src_reg_for_int(16));
}
-
/* first time use previous instruction */
if (dinst == NULL) {
dinst = inst;
@@ -804,11 +803,10 @@ glsl_to_tgsi_visitor::emit_asm(ir_instruction *ir, unsigned op,
dinst->dst[j].writemask = (i & 1) ? WRITEMASK_ZW : WRITEMASK_XY;
dinst->dst[j].index = initial_dst_idx[j];
if (i > 1) {
- if (dinst->op == TGSI_OPCODE_STORE) {
+ if (dinst->op == TGSI_OPCODE_LOAD || dinst->op == TGSI_OPCODE_STORE)
dinst->src[0] = addr;
- } else {
+ if (dinst->op != TGSI_OPCODE_STORE)
dinst->dst[j].index++;
- }
}
} else {
/* if we aren't writing to a double, just get the bit of the initial writemask