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authorTopi Pohjolainen <[email protected]>2017-01-17 11:44:52 +0200
committerEmil Velikov <[email protected]>2017-01-24 17:17:22 +0000
commit7d5a98f106b0695aca305bac8eb8833324bb8fe3 (patch)
tree6e3f6ba5c5e6a19a3480f8a488c7ec2a5759fe33 /src/mesa/state_tracker/st_atom_list.h
parent4e6445caa96f66736b47b257a59dc922e31b7cf6 (diff)
i965: Make depth clear flushing more explicit
Current blorp logic issues unconditional "flush everything" (see brw_emit_mi_flush()) after each render. For example, all blits issue this unconditionally which shouldn't be needed if they set render cache properly so that subsequent renders do necessary flushing before drawing. In case of piglit: ext_framebuffer_multisample-accuracy all_samples depth_draw small intel_hiz_exec() is always preceded by blorb blit and the unconditional flush looks to hide the lack of stall and flushes in depth clears. By removing the brw_emit_mi_flush() I get gpu hangs. This patch adds the stalls and flushes mandated by the spec and gets rid of those hangs. v2 (Jason, Ken): Document the rational for separating depth cache flush and stall on Gen7. Signed-off-by: Topi Pohjolainen <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> (cherry picked from commit e6da6943fed1228c551af1f0e1a405b6d67b41ae)
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