diff options
author | Kenneth Graunke <[email protected]> | 2016-01-07 15:54:16 -0800 |
---|---|---|
committer | Matt Turner <[email protected]> | 2016-01-13 10:35:12 -0800 |
commit | b85a229e1f542426b1c8000569d89cd4768b9339 (patch) | |
tree | a770a5444309a93cc7e574f95935e7a5a62016c9 /src/mesa/program | |
parent | 92f177386954caced2e7ddca156917cf166f9c23 (diff) |
glsl: Delete the ir_binop_bfm and ir_triop_bfi opcodes.
TGSI doesn't use these - it just translates ir_quadop_bitfield_insert
directly. NIR can handle ir_quadop_bitfield_insert as well.
These opcodes were only used for i965, and with Jason's recent patches,
we can do this lowering in NIR (which also gains us SPIR-V handling).
So there's not much point to retaining this GLSL IR lowering code.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Matt Turner <[email protected]>
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'src/mesa/program')
-rw-r--r-- | src/mesa/program/ir_to_mesa.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/mesa/program/ir_to_mesa.cpp b/src/mesa/program/ir_to_mesa.cpp index 852655df105..9cde28dfc0a 100644 --- a/src/mesa/program/ir_to_mesa.cpp +++ b/src/mesa/program/ir_to_mesa.cpp @@ -1303,9 +1303,7 @@ ir_to_mesa_visitor::visit(ir_expression *ir) break; case ir_binop_vector_extract: - case ir_binop_bfm: case ir_triop_fma: - case ir_triop_bfi: case ir_triop_bitfield_extract: case ir_triop_vector_insert: case ir_quadop_bitfield_insert: |