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authorKristian Høgsberg <[email protected]>2015-05-08 22:32:37 -0700
committerKristian Høgsberg <[email protected]>2015-05-09 11:38:32 -0700
commit769785c497aaa60c629e0299e3ebfff53a8e393e (patch)
tree0388971be6de7a75e2bfe0ac0fa3cc7d1bd7679d /src/mesa/drivers
parentd6fb155f30ac2bd7853da32ddf99e9f7840a8f01 (diff)
Add vulkan driver for BDW
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/common/dri_test.c9
-rw-r--r--src/mesa/drivers/dri/i965/Makefile.am11
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.c4
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h9
-rw-r--r--src/mesa/drivers/dri/i965/brw_defines.h2
-rw-r--r--src/mesa/drivers/dri/i965/brw_device_info.c12
-rw-r--r--src/mesa/drivers/dri/i965/brw_device_info.h1
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs.cpp33
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp19
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c45
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.h16
-rw-r--r--src/mesa/drivers/dri/i965/brw_state_cache.c3
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.h6
-rw-r--r--src/mesa/drivers/dri/i965/intel_debug.c2
-rw-r--r--src/mesa/drivers/dri/i965/intel_screen.c72
16 files changed, 221 insertions, 25 deletions
diff --git a/src/mesa/drivers/dri/common/dri_test.c b/src/mesa/drivers/dri/common/dri_test.c
index 57bfa5b9394..310e7617e2f 100644
--- a/src/mesa/drivers/dri/common/dri_test.c
+++ b/src/mesa/drivers/dri/common/dri_test.c
@@ -1,3 +1,4 @@
+#include <stdlib.h>
#include "main/glheader.h"
#include "main/compiler.h"
#include "glapi/glapi.h"
@@ -33,12 +34,14 @@ _glapi_check_multithread(void)
PUBLIC void
_glapi_set_context(void *context)
-{}
+{
+ _glapi_Context = context;
+}
PUBLIC void *
_glapi_get_context(void)
{
- return 0;
+ return _glapi_Context;
}
PUBLIC void
@@ -84,7 +87,7 @@ _glapi_set_nop_handler(_glapi_nop_handler_proc func)
PUBLIC struct _glapi_table *
_glapi_new_nop_table(unsigned num_entries)
{
- return NULL;
+ return malloc(16);
}
#ifndef NO_MAIN
diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am
index 235bcfeae02..cf2424e34b4 100644
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -41,7 +41,7 @@ AM_CFLAGS = \
AM_CXXFLAGS = $(AM_CFLAGS)
-noinst_LTLIBRARIES = libi965_dri.la
+noinst_LTLIBRARIES = libi965_dri.la libi965_compiler.la
libi965_dri_la_SOURCES = $(i965_FILES)
libi965_dri_la_LIBADD = $(INTEL_LIBS)
@@ -54,6 +54,15 @@ TEST_LIBS = \
$(CLOCK_LIB) \
../common/libdri_test_stubs.la
+libi965_compiler_la_SOURCES = $(i965_FILES)
+libi965_compiler_la_LIBADD = $(INTEL_LIBS) \
+ ../common/libdricommon.la \
+ ../common/libmegadriver_stub.la \
+ ../../../libmesa.la \
+ $(DRI_LIB_DEPS) \
+ $(CLOCK_LIB) \
+ ../common/libdri_test_stubs.la -lm
+
TESTS = \
test_fs_cmod_propagation \
test_fs_saturate_propagation \
diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
index fd7420a6c6f..18a30a5925e 100644
--- a/src/mesa/drivers/dri/i965/brw_context.c
+++ b/src/mesa/drivers/dri/i965/brw_context.c
@@ -830,6 +830,7 @@ brwCreateContext(gl_api api,
intel_batchbuffer_init(brw);
+#if 0
if (brw->gen >= 6) {
/* Create a new hardware context. Using a hardware context means that
* our GPU state will be saved/restored on context switch, allowing us
@@ -848,6 +849,7 @@ brwCreateContext(gl_api api,
}
brw_init_state(brw);
+#endif
intelInitExtensions(ctx);
@@ -909,8 +911,10 @@ brwCreateContext(gl_api api,
_mesa_compute_version(ctx);
+#if 0
_mesa_initialize_dispatch_tables(ctx);
_mesa_initialize_vbo_vtxfmt(ctx);
+#endif
if (ctx->Extensions.AMD_performance_monitor) {
brw_init_performance_monitors(brw);
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 834aaa45737..2d4a7eab20b 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -359,6 +359,9 @@ struct brw_stage_prog_data {
/** @} */
} binding_table;
+ uint32_t *map_entries;
+ uint32_t *bind_map[4];
+
GLuint nr_params; /**< number of float params/constants */
GLuint nr_pull_params;
@@ -1976,6 +1979,12 @@ gen6_upload_push_constants(struct brw_context *brw,
struct brw_stage_state *stage_state,
enum aub_state_struct_type type);
+struct intel_screen *intel_screen_create(int fd);
+void intel_screen_destroy(struct intel_screen *screen);
+
+struct brw_context *intel_context_create(struct intel_screen *screen);
+void intel_context_destroy(struct brw_context *brw);
+
#ifdef __cplusplus
}
#endif
diff --git a/src/mesa/drivers/dri/i965/brw_defines.h b/src/mesa/drivers/dri/i965/brw_defines.h
index 83d7a3535e4..3c704ee9d08 100644
--- a/src/mesa/drivers/dri/i965/brw_defines.h
+++ b/src/mesa/drivers/dri/i965/brw_defines.h
@@ -55,6 +55,7 @@
# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_SEQUENTIAL (0 << 8)
# define GEN7_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (1 << 8)
+#ifndef _3DPRIM_POINTLIST /* FIXME: Avoid clashing with defines from bdw_pack.h */
#define _3DPRIM_POINTLIST 0x01
#define _3DPRIM_LINELIST 0x02
#define _3DPRIM_LINESTRIP 0x03
@@ -76,6 +77,7 @@
#define _3DPRIM_LINESTRIP_BF 0x13
#define _3DPRIM_LINESTRIP_CONT_BF 0x14
#define _3DPRIM_TRIFAN_NOSTIPPLE 0x15
+#endif
/* We use this offset to be able to pass native primitive types in struct
* _mesa_prim::mode. Native primitive types are BRW_PRIM_OFFSET +
diff --git a/src/mesa/drivers/dri/i965/brw_device_info.c b/src/mesa/drivers/dri/i965/brw_device_info.c
index 97243a47293..a07b86e60e2 100644
--- a/src/mesa/drivers/dri/i965/brw_device_info.c
+++ b/src/mesa/drivers/dri/i965/brw_device_info.c
@@ -353,3 +353,15 @@ brw_get_device_info(int devid, int revision)
return devinfo;
}
+
+const char *
+brw_get_device_name(int devid)
+{
+ switch (devid) {
+#undef CHIPSET
+#define CHIPSET(id, family, name) case id: return name;
+#include "pci_ids/i965_pci_ids.h"
+ default:
+ return NULL;
+ }
+}
diff --git a/src/mesa/drivers/dri/i965/brw_device_info.h b/src/mesa/drivers/dri/i965/brw_device_info.h
index 65c024ceeed..9192235fb0e 100644
--- a/src/mesa/drivers/dri/i965/brw_device_info.h
+++ b/src/mesa/drivers/dri/i965/brw_device_info.h
@@ -85,3 +85,4 @@ struct brw_device_info
};
const struct brw_device_info *brw_get_device_info(int devid, int revision);
+const char *brw_get_device_name(int devid);
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index b2701b89689..8a9bbdbae52 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1910,6 +1910,10 @@ fs_visitor::assign_vs_urb_setup()
unsigned vue_entries =
MAX2(count, vs_prog_data->base.vue_map.num_slots);
+ /* URB entry size is counted in units of 64 bytes (for the 3DSTATE_URB_VS
+ * command). Each attribute is 16 bytes (4 floats/dwords), so each unit
+ * fits four attributes.
+ */
vs_prog_data->base.urb_entry_size = ALIGN(vue_entries, 4) / 4;
vs_prog_data->base.urb_read_length = (count + 1) / 2;
@@ -3033,9 +3037,22 @@ fs_visitor::emit_repclear_shader()
brw_wm_prog_key *key = (brw_wm_prog_key*) this->key;
int base_mrf = 1;
int color_mrf = base_mrf + 2;
+ fs_inst *mov;
+
+ if (uniforms == 1) {
+ mov = emit(MOV(vec4(brw_message_reg(color_mrf)),
+ fs_reg(UNIFORM, 0, BRW_REGISTER_TYPE_F)));
+ } else {
+ struct brw_reg reg =
+ brw_reg(BRW_GENERAL_REGISTER_FILE,
+ 2, 3, 0, 0, BRW_REGISTER_TYPE_F,
+ BRW_VERTICAL_STRIDE_8,
+ BRW_WIDTH_2,
+ BRW_HORIZONTAL_STRIDE_4, BRW_SWIZZLE_XYZW, WRITEMASK_XYZW);
+
+ mov = emit(MOV(vec4(brw_message_reg(color_mrf)), fs_reg(reg)));
+ }
- fs_inst *mov = emit(MOV(vec4(brw_message_reg(color_mrf)),
- fs_reg(UNIFORM, 0, BRW_REGISTER_TYPE_F)));
mov->force_writemask_all = true;
fs_inst *write;
@@ -3065,8 +3082,10 @@ fs_visitor::emit_repclear_shader()
assign_curb_setup();
/* Now that we have the uniform assigned, go ahead and force it to a vec4. */
- assert(mov->src[0].file == HW_REG);
- mov->src[0] = brw_vec4_grf(mov->src[0].fixed_hw_reg.nr, 0);
+ if (uniforms == 1) {
+ assert(mov->src[0].file == HW_REG);
+ mov->src[0] = brw_vec4_grf(mov->src[0].fixed_hw_reg.nr, 0);
+ }
}
/**
@@ -4081,7 +4100,8 @@ fs_visitor::run_vs()
{
assert(stage == MESA_SHADER_VERTEX);
- assign_common_binding_table_offsets(0);
+ if (prog_data->map_entries == NULL)
+ assign_common_binding_table_offsets(0);
setup_vs_payload();
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
@@ -4129,7 +4149,8 @@ fs_visitor::run_fs()
sanity_param_count = prog->Parameters->NumParameters;
- assign_binding_table_offsets();
+ if (prog_data->map_entries == NULL)
+ assign_binding_table_offsets();
if (devinfo->gen >= 6)
setup_payload_gen6();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 80ca1b750f8..975f5f6b2c9 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -1198,14 +1198,20 @@ fs_visitor::visit(ir_expression *ir)
ir_constant *const_uniform_block = ir->operands[0]->as_constant();
ir_constant *const_offset = ir->operands[1]->as_constant();
fs_reg surf_index;
+ uint32_t binding, set, index, set_index;
if (const_uniform_block) {
/* The block index is a constant, so just emit the binding table entry
* as an immediate.
*/
- surf_index = fs_reg(stage_prog_data->binding_table.ubo_start +
- const_uniform_block->value.u[0]);
+ index = const_uniform_block->value.u[0];
+ set = shader->base.UniformBlocks[index].Set;
+ set_index = shader->base.UniformBlocks[index].Index;
+ binding = stage_prog_data->bind_map[set][set_index];
+ surf_index = fs_reg(binding);
} else {
+ assert(0 && "need more info from the ir for this.");
+
/* The block index is not a constant. Evaluate the index expression
* per-channel and add the base UBO index; we have to select a value
* from any live channel.
@@ -2289,8 +2295,13 @@ fs_visitor::emit_texture(ir_texture_opcode op,
void
fs_visitor::visit(ir_texture *ir)
{
- uint32_t sampler =
- _mesa_get_sampler_uniform_value(ir->sampler, shader_prog, prog);
+ uint32_t sampler;
+
+ ir_dereference_variable *deref_var = ir->sampler->as_dereference_variable();
+ assert(deref_var);
+ ir_variable *var = deref_var->var;
+
+ sampler = stage_prog_data->bind_map[var->data.set][var->data.index];
ir_rvalue *nonconst_sampler_index =
_mesa_get_sampler_array_nonconst_index(ir->sampler);
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 52c73031a3c..45c132b4a9e 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -33,19 +33,23 @@
#include "brw_state.h"
#include "brw_ff_gs.h"
-
bool
-brw_codegen_gs_prog(struct brw_context *brw,
+brw_compile_gs_prog(struct brw_context *brw,
struct gl_shader_program *prog,
struct brw_geometry_program *gp,
- struct brw_gs_prog_key *key)
+ struct brw_gs_prog_key *key,
+ struct brw_gs_compile_output *output)
{
- struct brw_stage_state *stage_state = &brw->gs.base;
struct brw_gs_compile c;
memset(&c, 0, sizeof(c));
c.key = *key;
c.gp = gp;
+ /* We get the bind map as input in the output struct...*/
+ c.prog_data.base.base.map_entries = output->prog_data.base.base.map_entries;
+ memcpy(c.prog_data.base.base.bind_map, output->prog_data.base.base.bind_map,
+ sizeof(c.prog_data.base.base.bind_map));
+
c.prog_data.include_primitive_id =
(gp->program.Base.InputsRead & VARYING_BIT_PRIMITIVE_ID) != 0;
@@ -274,18 +278,41 @@ brw_codegen_gs_prog(struct brw_context *brw,
c.prog_data.base.base.total_scratch
= brw_get_scratch_size(c.base.last_scratch*REG_SIZE);
+ }
+
+ output->mem_ctx = mem_ctx;
+ output->program = program;
+ output->program_size = program_size;
+ memcpy(&output->prog_data, &c.prog_data,
+ sizeof(output->prog_data));
+
+ return true;
+}
+
+bool
+brw_codegen_gs_prog(struct brw_context *brw,
+ struct gl_shader_program *prog,
+ struct brw_geometry_program *gp,
+ struct brw_gs_prog_key *key)
+{
+ struct brw_gs_compile_output output;
+ struct brw_stage_state *stage_state = &brw->gs.base;
+
+ if (brw_compile_gs_prog(brw, prog, gp, key, &output))
+ return false;
+ if (output.prog_data.base.base.total_scratch) {
brw_get_scratch_bo(brw, &stage_state->scratch_bo,
- c.prog_data.base.base.total_scratch *
+ output.prog_data.base.base.total_scratch *
brw->max_gs_threads);
}
brw_upload_cache(&brw->cache, BRW_CACHE_GS_PROG,
- &c.key, sizeof(c.key),
- program, program_size,
- &c.prog_data, sizeof(c.prog_data),
+ key, sizeof(*key),
+ output.program, output.program_size,
+ &output.prog_data, sizeof(output.prog_data),
&stage_state->prog_offset, &brw->gs.prog_data);
- ralloc_free(mem_ctx);
+ ralloc_free(output.mem_ctx);
return true;
}
diff --git a/src/mesa/drivers/dri/i965/brw_gs.h b/src/mesa/drivers/dri/i965/brw_gs.h
index b327c40f140..573bbdb16f8 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.h
+++ b/src/mesa/drivers/dri/i965/brw_gs.h
@@ -37,6 +37,22 @@ struct gl_context;
struct gl_shader_program;
struct gl_program;
+struct brw_gs_compile_output {
+ void *mem_ctx;
+ const void *program;
+ uint32_t program_size;
+ struct brw_gs_prog_data prog_data;
+};
+
+struct brw_gs_prog_key;
+
+bool
+brw_compile_gs_prog(struct brw_context *brw,
+ struct gl_shader_program *prog,
+ struct brw_geometry_program *gp,
+ struct brw_gs_prog_key *key,
+ struct brw_gs_compile_output *output);
+
bool brw_gs_prog_data_compare(const void *a, const void *b);
void
diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c b/src/mesa/drivers/dri/i965/brw_state_cache.c
index 157b33d4f4c..24778d25379 100644
--- a/src/mesa/drivers/dri/i965/brw_state_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_state_cache.c
@@ -427,6 +427,9 @@ brw_destroy_cache(struct brw_context *brw, struct brw_cache *cache)
DBG("%s\n", __func__);
+ if (cache->bo == NULL)
+ return;
+
if (brw->has_llc)
drm_intel_bo_unmap(cache->bo);
drm_intel_bo_unreference(cache->bo);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 45a03bba857..5496225a6c7 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -46,7 +46,7 @@
* Return a bitfield where bit n is set if barycentric interpolation mode n
* (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader.
*/
-static unsigned
+unsigned
brw_compute_barycentric_interp_modes(struct brw_context *brw,
bool shade_model_flat,
bool persample_shading,
diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index 0a8a97b2f5e..73a741f89e4 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -90,6 +90,12 @@ bool brw_wm_prog_data_compare(const void *a, const void *b);
void
brw_upload_wm_prog(struct brw_context *brw);
+unsigned
+brw_compute_barycentric_interp_modes(struct brw_context *brw,
+ bool shade_model_flat,
+ bool persample_shading,
+ const struct gl_fragment_program *fprog);
+
#ifdef __cplusplus
} // extern "C"
#endif
diff --git a/src/mesa/drivers/dri/i965/intel_debug.c b/src/mesa/drivers/dri/i965/intel_debug.c
index 53f575ab78f..33a0348486d 100644
--- a/src/mesa/drivers/dri/i965/intel_debug.c
+++ b/src/mesa/drivers/dri/i965/intel_debug.c
@@ -60,7 +60,7 @@ static const struct dri_debug_control debug_control[] = {
{ "urb", DEBUG_URB },
{ "vs", DEBUG_VS },
{ "clip", DEBUG_CLIP },
- { "aub", DEBUG_AUB },
+ { "foob", DEBUG_AUB }, /* disable aub dumbing in the dri driver */
{ "shader_time", DEBUG_SHADER_TIME },
{ "no16", DEBUG_NO16 },
{ "blorp", DEBUG_BLORP },
diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
index dda16389f8a..4860a160ee9 100644
--- a/src/mesa/drivers/dri/i965/intel_screen.c
+++ b/src/mesa/drivers/dri/i965/intel_screen.c
@@ -1416,6 +1416,78 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
return (const __DRIconfig**) intel_screen_make_configs(psp);
}
+struct intel_screen *
+intel_screen_create(int fd)
+{
+ __DRIscreen *psp;
+ __DRIconfig **configs;
+ int i;
+
+ psp = malloc(sizeof(*psp));
+ if (psp == NULL)
+ return NULL;
+
+ psp->image.loader = (void *) 1; /* Don't complain about this being NULL */
+ psp->fd = fd;
+ psp->dri2.useInvalidate = (void *) 1;
+
+ configs = (__DRIconfig **) intelInitScreen2(psp);
+ for (i = 0; configs[i]; i++)
+ free(configs[i]);
+ free(configs);
+
+ return psp->driverPrivate;
+}
+
+void
+intel_screen_destroy(struct intel_screen *screen)
+{
+ __DRIscreen *psp;
+
+ psp = screen->driScrnPriv;
+ intelDestroyScreen(screen->driScrnPriv);
+ free(psp);
+}
+
+
+struct brw_context *
+intel_context_create(struct intel_screen *screen)
+{
+ __DRIcontext *driContextPriv;
+ struct brw_context *brw;
+ unsigned error;
+
+ driContextPriv = malloc(sizeof(*driContextPriv));
+ if (driContextPriv == NULL)
+ return NULL;
+
+ driContextPriv->driScreenPriv = screen->driScrnPriv;
+
+ brwCreateContext(API_OPENGL_CORE,
+ NULL, /* visual */
+ driContextPriv,
+ 3, 0,
+ 0, /* flags */
+ false, /* notify_reset */
+ &error,
+ NULL);
+
+ brw = driContextPriv->driverPrivate;
+ brw->ctx.FirstTimeCurrent = false;
+
+ return driContextPriv->driverPrivate;
+}
+
+void
+intel_context_destroy(struct brw_context *brw)
+{
+ __DRIcontext *driContextPriv;
+
+ driContextPriv = brw->driContext;
+ intelDestroyContext(driContextPriv);
+ free(driContextPriv);
+}
+
struct intel_buffer {
__DRIbuffer base;
drm_intel_bo *bo;