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authorCaio Marcelo de Oliveira Filho <[email protected]>2018-09-21 16:07:38 -0700
committerMarge Bot <[email protected]>2020-04-07 17:16:09 +0000
commit395de69b1febf4cfca29482e1ff7ddd2ae400d8b (patch)
treea9a63e938be900cf535fdc734c0281edc2ef348e /src/mesa/drivers
parentafa5447312352cd68d4688d9521cb1de25a9939c (diff)
intel/fs: Allow multiple slots for position
Change brw_compute_vue_map() to also take the number of pos slots. If more than one slot is used, the VARYING_SLOT_POS is treated as an array. When using Primitive Replication, instead of a single position, the VUE must contain an array of positions. Padding might be necessary (after clip distance) to ensure rest of attributes start aligned. v2: Add note about array in the commit message and assert that pos_slots >= 1 to make clear 0 is invalid. (Jason) Move padding to be after the clip distance. v3: Apply the correct offset when gathering the sources from outputs. Reviewed-by: Jason Ekstrand <[email protected]> [v2] Reviewed-by: Kenneth Graunke <[email protected]> Reviewed-by: Rafael Antognolli <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/2313>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_gs.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs.c2
-rw-r--r--src/mesa/drivers/dri/i965/brw_wm.c2
3 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c
index 74a6c379711..c7c0ec0d41e 100644
--- a/src/mesa/drivers/dri/i965/brw_gs.c
+++ b/src/mesa/drivers/dri/i965/brw_gs.c
@@ -79,7 +79,7 @@ brw_codegen_gs_prog(struct brw_context *brw,
brw_compute_vue_map(devinfo,
&prog_data.base.vue_map, outputs_written,
- gp->program.info.separate_shader);
+ gp->program.info.separate_shader, 1);
int st_index = -1;
if (INTEL_DEBUG & DEBUG_SHADER_TIME)
diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c
index 1e9cecf9f90..6ce7a1ce889 100644
--- a/src/mesa/drivers/dri/i965/brw_vs.c
+++ b/src/mesa/drivers/dri/i965/brw_vs.c
@@ -159,7 +159,7 @@ brw_codegen_vs_prog(struct brw_context *brw,
brw_compute_vue_map(devinfo,
&prog_data.base.vue_map, outputs_written,
- nir->info.separate_shader);
+ nir->info.separate_shader, 1);
if (0) {
_mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true);
diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c
index 6f5c144eaa9..256115103dd 100644
--- a/src/mesa/drivers/dri/i965/brw_wm.c
+++ b/src/mesa/drivers/dri/i965/brw_wm.c
@@ -602,7 +602,7 @@ brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
if (devinfo->gen < 6) {
brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
prog->info.inputs_read | VARYING_BIT_POS,
- false);
+ false, 1);
}
bool success = brw_codegen_wm_prog(brw, bfp, &key, &vue_map);