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authorRafael Antognolli <[email protected]>2018-01-26 11:19:31 -0800
committerRafael Antognolli <[email protected]>2018-01-26 12:02:34 -0800
commit131e871385b343467d3f8be0a8f3ccf09ab81075 (patch)
tree92f454a7dcbc7ce8cb20ca3ec3439b67794fc314 /src/mesa/drivers
parent20578f81a6a9a7d13b97083863d1240ac13aa5bd (diff)
i965/gen10: Use CS Stall instead of WriteImmediate.cros-mesa-18.1_pre1-r4-vanillachadv/cros-mesa-18.1_pre1-r4-vanilla
Fixes: ca19ee33d7d39cb89d948b1c983763065975ce5b Signed-off-by: Rafael Antognolli <[email protected]> Cc: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'src/mesa/drivers')
-rw-r--r--src/mesa/drivers/dri/i965/brw_pipe_control.c10
1 files changed, 4 insertions, 6 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_pipe_control.c b/src/mesa/drivers/dri/i965/brw_pipe_control.c
index eb8ada63129..e5b3ffe640c 100644
--- a/src/mesa/drivers/dri/i965/brw_pipe_control.c
+++ b/src/mesa/drivers/dri/i965/brw_pipe_control.c
@@ -353,12 +353,10 @@ gen7_emit_vs_workaround_flush(struct brw_context *brw)
void
gen10_emit_isp_disable(struct brw_context *brw)
{
- const struct gen_device_info *devinfo = &brw->screen->devinfo;
-
- brw_emit_pipe_control_write(brw,
- PIPE_CONTROL_ISP_DIS |
- PIPE_CONTROL_WRITE_IMMEDIATE,
- brw->workaround_bo, 0, 0);
+ brw_emit_pipe_control(brw,
+ PIPE_CONTROL_ISP_DIS |
+ PIPE_CONTROL_CS_STALL,
+ NULL, 0, 0);
brw->vs.base.push_constants_dirty = true;
brw->tcs.base.push_constants_dirty = true;