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authorKristian Høgsberg Kristensen <[email protected]>2015-10-21 22:49:14 -0700
committerKristian Høgsberg Kristensen <[email protected]>2015-10-23 09:42:28 -0700
commitfeff21d1a6ba49a0d6f7526e1ff473a0b574c92e (patch)
tree24fac23e4aaa847bfcfbdb87a3abfbc4b914cc03 /src/mesa/drivers/dri
parent0a5a738252afdd64b778024bcd130473b9a6224e (diff)
i965/fs: Drop offset_reg temporary in ssbo load
Now that we don't read each component one-by-one, we don't need the temoprary vgrf for the offset. More importantly, this register was type UD while the nir source was type D. This broke copy propagation and left a redundant MOV in the generated code. Reviewed-by: Francisco Jerez <[email protected]> Signed-off-by: Kristian Høgsberg Kristensen <[email protected]>
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_nir.cpp8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index 00f200a6c97..a82c616e8fb 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1521,13 +1521,11 @@ fs_visitor::nir_emit_intrinsic(const fs_builder &bld, nir_intrinsic_instr *instr
}
/* Get the offset to read from */
- fs_reg offset_reg = vgrf(glsl_type::uint_type);
- unsigned const_offset_bytes = 0;
+ fs_reg offset_reg;
if (has_indirect) {
- bld.MOV(offset_reg, get_nir_src(instr->src[1]));
+ offset_reg = get_nir_src(instr->src[1]);
} else {
- const_offset_bytes = instr->const_index[0];
- bld.MOV(offset_reg, fs_reg(const_offset_bytes));
+ offset_reg = fs_reg(instr->const_index[0]);
}
/* Read the vector */