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authorPeter Clifton <[email protected]>2010-11-09 22:00:36 +0000
committerEric Anholt <[email protected]>2010-11-09 14:35:28 -0800
commitefb0417040f4bdd55cf07dd8f54ecd4fc92c1286 (patch)
tree82e9d80fb2ab5d36611b8988f2c8f37c121a439d /src/mesa/drivers/dri
parent00391c79416ffd4b6f3af0ad911b7b8210f746d1 (diff)
intel: Add assert check for blitting alignment.
Also fixup code comment to reflect that the GPU requires DWORD alignment, but in this case does not actually pass the value "in DWORDs" as I previously stated.
Diffstat (limited to 'src/mesa/drivers/dri')
-rw-r--r--src/mesa/drivers/dri/intel/intel_blit.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c
index 71188988306..c2917e9b07e 100644
--- a/src/mesa/drivers/dri/intel/intel_blit.c
+++ b/src/mesa/drivers/dri/intel/intel_blit.c
@@ -483,8 +483,8 @@ intel_emit_linear_blit(struct intel_context *intel,
/* Blits are in a different ringbuffer so we don't use them. */
assert(intel->gen < 6);
- /* The pitch hits the GPU as a is a signed value, IN DWORDs.
- * But we want width to match pitch. Max width is (1 << 15 - 1),
+ /* The pitch given to the GPU must be DWORD aligned, and
+ * we want width to match pitch. Max width is (1 << 15 - 1),
* rounding that down to the nearest DWORD is 1 << 15 - 4
*/
pitch = MIN2(size, (1 << 15) - 4);
@@ -502,6 +502,7 @@ intel_emit_linear_blit(struct intel_context *intel,
dst_offset += pitch * height;
size -= pitch * height;
assert (size < (1 << 15));
+ assert ((size & 3) == 0); /* Pitch must be DWORD aligned */
if (size != 0) {
ok = intelEmitCopyBlit(intel, 1,
size, src_bo, src_offset, I915_TILING_NONE,